JPS58138061A - Substrate for integrated circuit - Google Patents
Substrate for integrated circuitInfo
- Publication number
- JPS58138061A JPS58138061A JP2025282A JP2025282A JPS58138061A JP S58138061 A JPS58138061 A JP S58138061A JP 2025282 A JP2025282 A JP 2025282A JP 2025282 A JP2025282 A JP 2025282A JP S58138061 A JPS58138061 A JP S58138061A
- Authority
- JP
- Japan
- Prior art keywords
- thickness
- layer
- ceramic
- substrate
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
【発明の詳細な説明】
本発明はテープキャリア型実装方式のIC,ノ)イブリ
ッドICなど各種ICに用いる基板材料に関するもので
あり、耐熱性及び熱放散性を改善して、テープキャリア
型実装方式の適用可能範囲を著しく向上させることを可
能にする基板を提供するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a substrate material used for various ICs such as tape carrier type mounting type ICs and hybrid ICs. The present invention provides a substrate that can significantly improve the range of applications.
テープキャリア型IC実装はIC実装の連続化及びボン
ディング速度の向上の面でIC実装技術の中でも注目さ
れている。しかしながら基板用フィルムとしてポリイミ
ドなどの有機物が用いられることから耐熱性及び熱放散
性が十分でなく、近年需要がますます増大しつつあるパ
ワーIC用途への展開や部品実装の高密度化などが困難
であや実用可能範囲が限定されているのが実情である。Tape carrier type IC mounting is attracting attention among IC mounting technologies in terms of continuous IC mounting and improvement in bonding speed. However, since organic materials such as polyimide are used as substrate films, they do not have sufficient heat resistance and heat dissipation, making it difficult to apply them to power IC applications, for which demand has been increasing in recent years, and to increase the density of component mounting. The reality is that the scope of practical use is limited.
本発明はかかるテープキャリア型IC実装用基板フィル
ムの欠点を解消し、耐熱性、熱放散性良好なる基板フィ
ルムを提供せんとするものである。The present invention aims to eliminate the drawbacks of such a tape carrier type IC mounting substrate film and provide a substrate film having good heat resistance and heat dissipation properties.
第1図は現在広く用いられているテープキャリア型IC
実装に用いられる基板フィルムの一部断面構造を示すも
ので、ポリイミドフィルム1の上に銅箔2を接着したも
のである。この銅箔をレジスト法により回路形成したも
のがリードフレームとして用いられている。しかし、こ
の方法はポリイミドフィルムと銅箔の接合性が150°
C以上の温度に長時間さらされると著しく劣化すること
及びポリイミドフィルム自体の熱伝導性が悪いことから
IC組立工程での高温処理やIC動作時に発生する熱の
放散などの点で問題点が多い。Figure 1 shows a tape carrier type IC that is currently widely used.
This shows a partial cross-sectional structure of a substrate film used for mounting, in which a copper foil 2 is bonded onto a polyimide film 1. This copper foil is used as a lead frame by forming a circuit using a resist method. However, with this method, the bondability between polyimide film and copper foil is 150°.
Polyimide film deteriorates significantly if exposed to temperatures above ℃ for a long period of time, and the thermal conductivity of the polyimide film itself is poor, so there are many problems in terms of high-temperature processing in the IC assembly process and heat dissipation generated during IC operation. .
第2図は本発明によるテープキャリア型IC実装用基板
フィルムの一部断面構造を示すもので、基板として有機
物でなく、十分可撓性のある金属箔3を用い、この上に
電気絶縁性の士ラミックフィルム4を被覆した後、その
セラミック層の上にアルミニウムフィルム5を被覆しk
もので三層構造を示す。金属箔8は十分な可撓性を必要
とするため厚みは0.O1〜0.10jljLに限定さ
れる。材質としては、ICの熱膨張特性と熱放散特性に
対する要求に応じて選択されるが、コバール、42アロ
イ(4296Ni−Fe)各種銅合金、Cuクラッド4
2アロイクラツドCu、Cuクラッドステンレスクラッ
ドCu%42アロ − −
イクラツド鋼フラッド42アロイなどの材料が有効であ
る。又被覆上ラミック層4としては、厚み0.1〜8μ
mで、BN、 fiJ@OB 、AjN、 SiC,5
iBN4、YgOs から選ばれた1種又は2種以上
の酸化物が有益であり、回路基板の要求特性に応じて選
択することができる。七ラミック被覆層の厚みが0.1
μ以下では絶縁性の上で問題があり、8μ以上では被覆
コストが高くなることと可撓性、密着強度の点で問題が
ある。FIG. 2 shows a partial cross-sectional structure of a tape carrier type IC mounting substrate film according to the present invention. As the substrate, a sufficiently flexible metal foil 3 is used instead of an organic material, and an electrically insulating film is used as the substrate. After coating the ceramic layer 4, an aluminum film 5 is coated on the ceramic layer.
It shows a three-layer structure. Since the metal foil 8 needs sufficient flexibility, its thickness is set to 0. It is limited to O1 to 0.10jljL. The material is selected depending on the requirements for the thermal expansion and heat dissipation characteristics of the IC, and includes Kovar, 42 alloy (4296Ni-Fe), various copper alloys, Cu clad 4
Materials such as 2 alloy clad Cu, Cu clad stainless clad Cu% 42 alloy, and 42 alloy clad steel flood 42 alloy are effective. Moreover, the thickness of the upper ramic layer 4 is 0.1 to 8 μm.
m, BN, fiJ@OB, AjN, SiC,5
One or more oxides selected from iBN4, YgOs are useful and can be selected depending on the required characteristics of the circuit board. The thickness of the seven ramic coating layers is 0.1
If it is less than 8μ, there will be problems in terms of insulation, and if it is more than 8μ, there will be problems in terms of high coating cost and flexibility and adhesion strength.
七ラミック被覆層の上に被覆するアルミニウム箔5は8
二80μmの厚みが必要でこれは導電回路形成の上で必
要な厚さに基くものである。The aluminum foil 5 coated on the seven lamic coating layers is 8
A thickness of 280 μm is required, which is based on the thickness required for forming the conductive circuit.
ここで回路形成材料としてアルミニウムを用いたのはA
ノ細線によるワイヤーポンディングが直接容易に可能の
為でSiチップのダイポンディングは、ペースト法によ
りゃはり可能である。Here, aluminum was used as the circuit forming material by A.
Since wire bonding using thin wires can be performed directly and easily, die bonding of Si chips can be performed using a paste method.
セラミック及びアルミニウムフィルムの被覆法としては
薄く均一で安定な密着性の点で物理的気相蒸着法(pv
c法)や化学的気相蒸着法(CVD法)などの気相メッ
キ法を用いると本発明の効果が顕著である。As a coating method for ceramic and aluminum films, physical vapor deposition (PV) is used because of its thin, uniform, and stable adhesion.
The effect of the present invention is remarkable when a vapor phase plating method such as c method) or chemical vapor deposition method (CVD method) is used.
しかし、アルミニウムフィルムの被覆は接着剤による方
法、圧接法も利用し得る。However, an adhesive method or a pressure bonding method can also be used to cover the aluminum film.
以下実施例によって説明する。This will be explained below using examples.
板厚0.08jlKの銅クラツド42アロイクラツド銅
の上にイオンブレーティング法でAjgOs薄膜を2.
0μm被覆したのち、イオンスパッタリング法で8μm
のアルミニウム膜を被覆した。2. AjgOs thin film was deposited on copper clad 42 alloy clad copper with a plate thickness of 0.08jlK using the ion blasting method.
After 0μm coating, 8μm coating by ion sputtering method.
coated with an aluminum film.
基板としては積層金属テープを用い熱膨張係数を7.
OX 10−6/ degとする為、銅比率(断面積比
)でB096とした。Aj 2OB被覆の為のイオンブ
レーティングは原料としてAノ208焼結体を用い、電
子ビーム加熱により蒸発させ、酸素圧4 X I P’
Torrで、18.56MHz 、 100〜200
Wノ高周波電力を印加して蒸発物質の一部をイオン化し
、基板を200″Cに加熱してAjg08を厚さ1.0
μm被覆し、絶縁耐圧3Mv/F+!以上の絶縁性良好
でかつ密着性、可撓性ノヨイフイルムヲ作製した。又ア
ルミニウムフィルムを形成するスパッタリング条件はタ
ーゲットとして純度99.99wt96のアルミニウム
を用い、アルゴンガス雰囲気で、基板を100”Cに加
熱して行った。このようにして作製した基板フィルムは
200°Cで長時間さらされてもその特性は劣化するこ
となく、被覆層が剥離することもなく可撓性も十分であ
った。The substrate is a laminated metal tape with a thermal expansion coefficient of 7.
In order to set OX 10-6/deg, the copper ratio (cross-sectional area ratio) was set to B096. Ion blating for Aj 2OB coating uses A-208 sintered body as the raw material, evaporates it by electron beam heating, and increases the oxygen pressure to 4 X I P'
Torr, 18.56MHz, 100-200
A high frequency power of W was applied to ionize a part of the evaporated substance, and the substrate was heated to 200"C to form Ajg08 with a thickness of 1.0
μm coated, withstand voltage 3Mv/F+! A flexible film with good insulation properties, adhesion, and flexibility was produced. The sputtering conditions for forming the aluminum film were as follows: aluminum with a purity of 99.99wt96 was used as the target, and the substrate was heated to 100"C in an argon gas atmosphere. The substrate film thus produced was heated to 200"C. Even when exposed for a long time, its properties did not deteriorate, the coating layer did not peel off, and the flexibility was sufficient.
以上説明した如く、十分な熱伝導性と所要の熱゛膨張特
性を有し、かつフィルムとして可撓性をもつ金属又は複
合合金テープ上に°電気絶縁性を有する七ラミック膜を
被覆した後、回路形成のためのアルミニウムフィルムを
被覆することにより、耐熱性及び放熱性良好で且つ直接
、ワイヤーポンディングが可能なテープキャリア型実装
方式のICに用いる基板材料を作製することができ、テ
ープキャリア型実装方式の適用範囲を著しく拡大するこ
とが可能となった。As explained above, after coating a metal or composite alloy tape with sufficient thermal conductivity and required thermal expansion characteristics and flexibility as a film with a lamic film having electrical insulation properties, By coating with an aluminum film for circuit formation, it is possible to create a substrate material used for tape carrier type ICs that has good heat resistance and heat dissipation properties and can be directly wire bonded. It has become possible to significantly expand the scope of application of the mounting method.
第1図は従来の基板フィルム1部所面図、第2図は本発
明による基板フィルムの1部所面図である。
l:ポリイミドフィルム、2:銅箔、8:金属箔、4:
セラミックフィルム、5ニアルミニウム箔。
芳I図FIG. 1 is a partial view of a conventional substrate film, and FIG. 2 is a partial partial view of a substrate film according to the present invention. l: polyimide film, 2: copper foil, 8: metal foil, 4:
Ceramic film, 5 Ni aluminum foil. Yoshi I diagram
Claims (3)
又は複合合金テープの上に、厚さ0.1〜3μmで電気
絶縁性を有するセラミック薄層があり、更にその上にア
ルミニウムフィルムが8〜80μmの厚みで被覆された
三層構造であることを特徴とするIC用基板。(1) Plate thickness 0. A thin electrically insulating ceramic layer with a thickness of 0.1 to 3 μm is placed on a flexible metal or composite alloy tape of O1 to 0.1041, and an aluminum film with a thickness of 8 to 80 μm is placed on top of the thin ceramic layer with a thickness of 0.1 to 3 μm. An IC substrate characterized by having a three-layer structure coated with a thickness.
08゜SiC,5iaN++ Yaksの1種又は2種
以上のセラミック薄層であることを特徴とする特許請求
の範囲第(1)項記載のIC用基板。(2) The ceramic that is the middle layer of the three layers is BN, Ajg
The IC substrate according to claim (1), characterized in that it is a ceramic thin layer of one or more types of 08°SiC, 5iaN++ Yaks.
はCVD法によって被覆されたものであることを特徴と
する特許請求の範囲第(1)項記載のIC基板。(3) The IC substrate according to claim (1), wherein the ceramic thin layer which is an intermediate layer among the three layers is coated by a PVD method or a CVD method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2025282A JPS58138061A (en) | 1982-02-10 | 1982-02-10 | Substrate for integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2025282A JPS58138061A (en) | 1982-02-10 | 1982-02-10 | Substrate for integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58138061A true JPS58138061A (en) | 1983-08-16 |
Family
ID=12021999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2025282A Pending JPS58138061A (en) | 1982-02-10 | 1982-02-10 | Substrate for integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58138061A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1243569A3 (en) * | 1994-04-11 | 2008-11-19 | Dowa Metaltech Co., Ltd. | Electrical circuit having a metal-bonded-ceramic material or MBC component as an insulating substrate |
-
1982
- 1982-02-10 JP JP2025282A patent/JPS58138061A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1243569A3 (en) * | 1994-04-11 | 2008-11-19 | Dowa Metaltech Co., Ltd. | Electrical circuit having a metal-bonded-ceramic material or MBC component as an insulating substrate |
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