JPS5813748U - Receiving machine - Google Patents
Receiving machineInfo
- Publication number
- JPS5813748U JPS5813748U JP10816381U JP10816381U JPS5813748U JP S5813748 U JPS5813748 U JP S5813748U JP 10816381 U JP10816381 U JP 10816381U JP 10816381 U JP10816381 U JP 10816381U JP S5813748 U JPS5813748 U JP S5813748U
- Authority
- JP
- Japan
- Prior art keywords
- feedback capacitor
- detection circuit
- power amplifier
- signal
- reception signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
- Noise Elimination (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面はこの考案の受信機の１実施例の結線図である。
５・・・・・・検波回路、７・・・・・・パワーアンプ
、９・・・・・・検出回路、Ｃｆ１． Ｃｆ２・・・・
・・第１、第２帰還コンデンサ。The drawing is a wiring diagram of one embodiment of the receiver of this invention. 5...Detection circuit, 7...Power amplifier, 9...Detection circuit, Cf1. Cf2...
...First and second feedback capacitors.
Claims (1)
ベル検出回路と、前記検波回路からの音声信号が入力さ
れるパワーアンプ回路と、該パワーアンプ回路の低域遮
断周波数設定用の第１帰還コンデンサと、該第１帰還コ
ンデンサより容量が大きく前記パワーアンプ回路の低域
遮断周波数を下降させる第２帰還コンデンサと、前記Ａ
Ｍ受信信号が所定レベル以下になったときの前記検出回
路からの検出信号により前記第１帰還コンデンサに前記
第２帰還コンデンサを並列接続する手段とを備えた受信
機。a detection circuit for an AM reception signal, a signal level detection circuit for the AM reception signal, a power amplifier circuit to which the audio signal from the detection circuit is input, and a first feedback for setting a low cutoff frequency of the power amplifier circuit. a second feedback capacitor that has a larger capacitance than the first feedback capacitor and lowers the low cutoff frequency of the power amplifier circuit;
and means for connecting the second feedback capacitor in parallel to the first feedback capacitor based on the detection signal from the detection circuit when the M reception signal becomes lower than a predetermined level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10816381U JPS5813748U (en) | 1981-07-20 | 1981-07-20 | Receiving machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10816381U JPS5813748U (en) | 1981-07-20 | 1981-07-20 | Receiving machine |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5813748U true JPS5813748U (en) | 1983-01-28 |
Family
ID=29902578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10816381U Pending JPS5813748U (en) | 1981-07-20 | 1981-07-20 | Receiving machine |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5813748U (en) |
-
1981
- 1981-07-20 JP JP10816381U patent/JPS5813748U/en active Pending
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