JPS58137240A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a cooling means for semiconductor device which does not require an exclusive power supply and can be loaded easily by integrating a Peltier effect element into a GaAs semiconductor device and utilizing an operating current of semiconductor device itself for Peltier cooling. CONSTITUTION:A Ge single crystal 2 is formed on an N type GaAs substrate 1. A semi-insulating GaAs single crystal layer 3 is formed on a single crystal 2. A logic IC layer 4 is formed as the active layer on the surface of single crystal layer 3. The wirings for drain electrode 5 and source electrode 6 are provided on the upper surface of said active layer, thus forming a Schottky gate FET. An ohmic electrode 7 is fixed on the heat sink material consisting of a diamond in the opposite side of the substrate 1. The electrode 8 is fixed to the earth. When each logic IC layer 4 executes logic operation, a current flows between the source and drain and a current I flows into the substrate 1 through the electrodes 6, 7. The Peltier effect is generated by this operation.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device having an integrated structure in which a cooling effect due to the Peltier effect is achieved using its own operating current.

Logic ICs, FITs, memories using GaAa as a substrate material,
Laser diodes and the like have been developed as ICs for high-speed computers and devices for optical communications, and some have been put into practical use. All of these devices have the disadvantage that they generate heat due to the power consumption required for their own operation, and the device performance (high speed, efficiency) is significantly reduced due to temperature rise.

Conventionally, the following methods have been used to solve this drawback.

(1) Devise element structure to operate with low power and high efficiency as much as possible.

(2) By devising a thermal design, structural devises are made to spread the amount of heat generated by each element over a wide area in a single time period, and an appropriate heat sink material is selected.

Two methods were adopted:

However, these methods have already been improved to a point close to their technical limits, and it is difficult to improve them further dramatically.

This invention has been made in view of the above points, and
A Peltier effect element is integrated into the Ag semiconductor device, and the operating current of the semiconductor device itself can be used for Peltier cooling, eliminating the need for a separate power source.
An object of the present invention is to provide a semiconductor device that can be easily mounted.

Embodiments of the semiconductor device of the present invention will be described below with reference to the drawings. The figure is a cross-sectional view showing the configuration of one example, ib, and shows the case where it is applied to a logic element with a cooling element. 1 in the figure is an NfiGaAs substrate used for Peltier cooling, and the carrier concentration is 8 x 10. ” as@degrees is the most efficient cooling method.

On this Ni1JGaAs substrate 1, a 9G single crystal 2 is formed by epitaxial growth. This G @ single crystal 2
It has good ohmic properties with the N-type G&M printed circuit board 1.

Epitaxially grown on this G single crystal 2, 10
A semi-insulating QaAs single crystal layer 3 having a resistivity of 1Ω or more is formed. Since Ge and QaAi have extremely similar lattice constants and coefficients of thermal expansion, such epitaxial growth can be easily achieved.

A logic IC layer 4 is formed as an active layer (semiconductor device IT) on the surface of the GaAs single crystal layer 30 thus formed by ion implantation or the like. This logic IC layer 4 mainly consists of an electrode arrangement on its upper surface, that is, wiring for a common drain electrode 5 and a common source electrode 6, and a Schottky gate FET which has been subjected to 99stivation.

On the other hand, 7 is N! II! It is an ohmic electrode on the opposite side of the lGmAs base ill, and is formed of a polygon of A u G @/N i or the like. This ohmic electrode 7 is fixed on a heat sink material made of diamond or the like.

Reference numeral 8 denotes an electrode provided on the G single crystal 2 which has been exposed by selective etching, and is made of Au or the like.

The common source electrode 6 and the ohmic electrode 7 are connected together, the electrode 8 is fixed to ground, and the common drain electrode 5 is connected to the common source electrode 6 .

Normally +1v~3. A potential of about V is applied.

In the semiconductor device of the present invention configured in this way,
When each logic IC layer 4 is made to perform a logic operation, [m] is generated between the source and drain of each logic IC layer 4, and these are all connected to the N-type GaAs substrate through the uncommon source electrode 6 and the ohmic electrode 7. The liquid flows in and further falls to the ground through the Go single crystal 2 and the electrode 8.

Watch this action.

A Beltier effect occurs.

That is, if we focus on the electrodynamics of electrons, electrons move from G single crystal 211il to N11GaAsfi plate l and Nll
It flows from the N11G substrate l to the ohmic electrode 7, and the former cools the G single crystal 2, while the latter generates heat in the ohmic electrode 7. By cooling the Go single crystal 2, the logic IC layer 4 is cooled.

On the other hand, the heat generated by the ohmic electrode 7 is immediately dissipated from the heat sink.

In addition, in Example 2 above, an insulating material called diamond was used as the heat sink, but even if a conductive material such as Cu is used, the heat sink material can be replaced with a thin conductive insulating layer or an arm cage material. , can be realized in the same way as in the above embodiments by making arrangements to raise the potential above H.

In addition, in the above example, the specific resistance of the N-board GmAg substrate l can be easily realized with a scratch on the order of 2 x 10-aΩ, and the ohmic contact resistance can be easily realized on the order of less than dlO-・Ω-, so that the Peltier effect element itself The potential drop due to resistance heating can be ignored.

In the embodiment described above, (1) the logic IC layer 4 itself can be directly cooled by the Beltier effect;

(2) Since the operating current of the logic IC layer is directly utilized, no separate power supply is required.

(3) Since the logic IC layer and the Peltier effect element are integrated, implementation is easy.

There are advantages such as

Furthermore, in the above embodiment, i1! is used for an example using a GaAa logic IC. As described above, the diodes, memories, FITs, etc. can be easily realized by properly wiring the electrodes.

Furthermore, since the Peltier effect element is integrated, it can be used in high-speed high-speed logic elements, Memo 91C, high-efficiency/9-watt FETs, high-efficiency long-life LEDs, LED diodes, etc.

As detailed above, the semiconductor device of the present invention has the following features:
An ohmic electrode is formed on one surface of the N 111 Ga 1 substrate, and a G single crystal having osmotic properties is formed on the other surface of the N 111 Ga 1 substrate. In particular, a semiconductor device made of GaAs or G/Mumium or a combination of both is formed on the G/single crystal plane of the Gibertier effect element, and the semiconductor device is raised so that its operating power is used for cooling the Peltier effect element. I did it like this,
It has the advantage that the element itself can be directly cooled by the Peltier effect, no separate power supply is required, and it can be easily mounted.

[Brief explanation of the drawing]

The figure is a sectional view showing the structure of an embodiment of the semiconductor device of the present invention. l...NllN11G substrate, 2...G single crystal, 3
... Semi-insulating GaAs single crystal layer, 4... Logic IC layer, 5... Common drain y electrode, 6... Common source electrode, 7... Ohmic electrode, 8... Electrode. 1.Indication of the incident 1945 Tatami permission request 1m1@1! II No. 2
, ii MeiO Name Semiconductor Device & Relationship with the Person Making Amendment Case Patent Applicant C029) Oki Electric Industry Co., Ltd. 4, Agent 5, Date of amendment order Showa year, month, day (self-motivated) 6, Details subject to amendment Book 0411 Permission - Requesting Range ■ and Issue - 0Ws Narration - O
Column 2 Contents of amendment 11) Correct "2. Scope of Claims" in the specification in the attached document. 2) Delete "Conductivity" from page 5, line 13 of the IN specifications. 3) Delete "Peltier effect element" on page 7, line 3. 2. Claims N 51 GaAs with an ohmic electrode on one surface
A substrate, a N[GaAs substrate formed with ohmic properties on the other surface of the G single crystal, and a G single crystal formed on the surface of the G single crystal, G1Ast or GaAAAi, or a combination of both. A semiconductor device consisting of a semiconductor device and wiring connected so that the operating power of the semiconductor device is used for cooling a Peltier effect element.

Claims (1)

[Claims] An N-type GaAs substrate having an ohmic electrode on one surface, a Ge single crystal having ohmic properties on the other surface forming a Peltier effect element, and a GaAs or GaAlAs layer on the surface of the Ge single crystal. Or a semiconductor device consisting of a combination of both, and a semiconductor device consisting of wiring connected so that the operating power of this semiconductor device is used for cooling the Peltier effect element.