JPS58137039A - Transfer circuit - Google Patents

Abstract

PURPOSE:To provide small-sized and high noise-resistance characteristic, by using a shift clock of other shift register inverted in phase as the shift clock of each shift register and exchanging N-bit information between two electronic circuit blocks. CONSTITUTION:In exchanging N-bit information between electronic circuits 9 and 10, when a shift clock applied to an input terminal 15 changes from L to H, the N-th bit data of a shift resister 14 is latched to the 1st abit of a shift register 11 and the N-th bit data of the register 11 is latched to an FF12. When the shift clock changes from H to L, an output of an inverter 16 goes from L to H, the latch data of the FF12 is latched to the 1st bit of the register 14, and the content of the register 14 is shifted. This is repeated by N-times, the content of the registers 11 and 14 is exchanged and the N-bit information is exchanged between the circuits 9 and 10.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transfer circuit for mutually exchanging N-bit information between electronic circuit blocks using (N+1)-bit and N-bit shift registers.

A conventional example is shown in FIG. When exchanging N-bit information between electronic circuit block 1 and electronic circuit block 2, N-bit shift registers 3 and 5 are used to input N shift clocks to the common shift clock input terminal 7. By adding , N-bit information is transferred from electronic circuit block 1 to electronic circuit block 2,
Next, N bits of information are transferred from the electronic circuit block 2 to the electronic circuit block 1 by applying N shift clocks to the common shift clock input terminal 8 using the bit shift registers 4 and 6. It was done by doing.

In this case, the shift clocks applied to shift registers 3, 6 or 4, 6 must be applied at exactly the same time,
Also, the data from the serial data output of shift register 3 is transferred to the serial data input of shift register 6 without delay.
Since the data from the serial data output of the shift register 6 must be applied to the serial data input of the shift register 4 without delay, it is necessary to install a delay circuit such as a commonly used OR low-pass filter in order to improve noise resistance. It was impossible to insert it into the clock input and data input lines of the shift register. Furthermore, when the distance between the electronic circuit blocks 1 and 2 becomes long, there is a problem that signal delays occur due to the effects of stray capacitance between them, resulting in malfunctions.

The present invention has been made to eliminate the above-mentioned conventional drawbacks, and one embodiment thereof will be described below with reference to FIG. 2.

In FIG. 2, 9 and 1o are electronic circuit blocks, and the electronic circuit block 9 is an N-bit shift register 1.
The electronic circuit block 1.degree. has an (N-1-1)-bit shift register 13 composed of one D-type flip-flop 12 and one D-type flip-flop 12, and the electronic circuit block 1.degree. has an N-bit shift register 14.

The serial data inputs of the shift registers 13 and 14 are connected to the serial data outputs of other shift registers 14 and 13, respectively, and the shift registers 1
The shift clock input terminal 16 of the entire circuit and the shift clock input terminal of the shift register 140 are connected so that the shift clock input terminal 3.14 receives the inverted phase of the shift clock of the other shift register 14.13. An inverter 16 is connected between them.

When exchanging N bits of information between the electronic circuit block 9 and the electronic circuit block 10 in the circuit shown in FIG. 2, the shift clock applied to the shift clock input terminal 15 is L.
When changing from to H, the data of the 2nd bit of the shift register 14 is launched to the 1st bit of the shift register 11, and the contents of the shift register 11 are shifted, respectively.
The data of the ON bit of the shift register 11 is launched into the D type flip-flop 12. Next, when the shift clock input changes from H to L, the output of the inverter 16 changes from L to H, and the D type flip-flop 12
The latch data is latched to the first bit of the shift register 14, and the contents of the shift register 14 are shifted respectively. By repeating the above operation N times, the contents of the shift register 11 and the contents of the shift register 14 are exchanged, and N bits of information are exchanged between the electronic circuit blocks 9 and 10.

According to the above structure of the present invention, there is no time constraint as seen in the conventional example described above, so even if the distance between the electronic circuit blocks 9 and 10 is long, the signal is not affected by the stray capacitance between them. Even if a delay occurs, malfunctions will no longer occur. Also, the third
As shown in the figure, low-pass filters 17, 18, and 19 can be inserted for the purpose of improving noise resistance characteristics. and,
Since only two expensive shift registers are used, the entire circuit becomes inexpensive. Therefore, in the present invention, as described above, an electronic circuit system that requires N-bit information exchange between two electronic circuit blocks can be improved stably and with high noise resistance characteristics regardless of the distance between the electronic circuit blocks. It can be supplied in a smaller size and at a lower cost.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a transfer circuit in a conventional example, and FIG. 2 is a block diagram showing an embodiment of a transfer circuit according to the present invention.
FIG. 3 is a block diagram showing another embodiment of the present invention. 9.10...Electronic circuit block-111, 14
...N-bit shift register, 12 old...
D type flip-flop, 13...(N+1
) bit shift register.

Claims (1)

[Claims] It has two electronic circuit blocks, one of which has an Oi+1) bit shift register composed of an N-bit shift register and one D type flip-flop, and the other has an N-bit shift register, The serial data input of each of the shift registers uses a phase-inverted shift clock of the other shift register, and N bits of information are exchanged between the two electronic circuit blocks. transfer circuit.