JPS58134468A - Transistor element and transistor device using the same - Google Patents

Abstract

PURPOSE:To obtain an inexpensive transistor device by isolating a P<-> type epitaxial layer via a P<+> type layer on a P type Si substrate, forming a P-N- P type transistor, attaching electrodes, and bonding them to a substrate support and wiring it. CONSTITUTION:A P<-> type epitaxial layer 2 is superposed on a P type Si substrate 1, windows 18 are opened at an SiO2 film 5, isolated via a P<+> type layer 14, an N type base 3 and a P type emitter 4 are formed by diffusion, and electrodes 6, 7, 15 are attached as prescribed. The collector electrode 15 is formed on the surface by forming the layer 14. The structure is then cut along a line X-X, the cut element is secured via epoxy adhesive 17 to a substrate support 8, wired at Al wirings 12, 13 to leads 10, 11 and sealed with resin. Since no noble metal is employed, the cost of the materials can be largely reduced, and since the bonding can be performed at a low temperature, the hFE is not almost varied.

Description

Detailed Description of the Invention The present invention utilizes gold-silicon eutectic by connecting the collector electrode of a transistor to the substrate support from the surface of the semiconductor substrate through a highly concentrated diffusion layer and an aluminum electrode. The present invention relates to a transistor element that can bond semiconductor substrates without using conventional substrate bonding methods, and a transistor device using the same.

An example of a conventional transistor structure is shown in FIG.

This transistor is a conventional epitaxial planar transistor, and in the figure, 1 is a collector silicon substrate of one conductivity type, 2 is a high resistivity epitaxial layer of the same conductivity type formed on the silicon substrate, and 3 is a high resistivity epitaxial layer of the same conductivity type. 4 is an emitter region, 6 is a 5i02 film, 6 is a base electrode, 7 is an emitter electrode, 8 is a substrate support connected to a collector lead, 9 is a solder material layer for adhesion such as gold, 10 is a base lead, 11 is an emitter lead, and 12 and 13 are thin metal wires that electrically connect the base and emitter electrodes of the transistor and the base and emitter leads.

By the way, a transistor having such a structure is formed as follows. First, S is applied to the surface of the epitaxial slice.
After forming the iO2 film, a base window is opened, a 5i02 film is simultaneously formed on the base window while base diffusion is performed, an emitter window is opened and an emitter is diffused, and a 5i02 film is applied to the emitter window at the same time. Then, the SiO2 film on part of the emitter window and part of the base window is removed, and electrodes made of aluminum or the like are formed to complete the wafer process.

Thereafter, the wafer is cut with a diamond scriber or the like, and the implanted transistor elements are separated into individual parts, which are then bonded to a substrate support via gold foil using a substrate bonding device. At this time, instead of using gold foil, the same effect can be obtained by using a gold vapor-deposited layer on the back side of the semiconductor substrate, and a gold-silicon eutectic layer is formed to support the semiconductor substrate (transistor element) and the substrate. Adhesion to the body is made. Then, the emitter and base electrode metals on the semiconductor substrate and the emitter and base leads are connected with thin wires such as gold or aluminum, and the wires are hardened using epoxy or mold resin such as silicon to complete the transistor.

In such conventional manufacturing methods, when the semiconductor substrate is a silicon substrate, gold foil or gold evaporation is absolutely necessary in order to bond the semiconductor substrate and the substrate support, which is a large part of the cost of the transistor. occupies weight. In order to make the above adhesion more complete, it is not only necessary to simply use gold foil or evaporate gold on the back side of the silicon substrate, but also to coat the surface of the substrate support in order to improve wetting between the two. The transistor must be plated with gold or silver, and the cost of using and processing this material also accounts for a significant portion of the cost of the transistor.

The present invention provides a transistor structure and a transistor manufacturing method that can bond transistor elements without using expensive precious metals that are indispensable in the manufacturing of conventional transistors. It is an object of the present invention to provide a transistor element in which all three electrodes of the transistor are present on one main surface side, and a transistor device using the same.

The structure of a transistor assembly using the transistor of the present invention will be described in detail below.

FIG. 2 is a cross-sectional view showing the structure of the transistor element of the present invention and a transistor assembly using the same, and is different from the conventional one shown in FIG. There is a region 14 of the same conductivity type as the silicon substrate that penetrates the layer 2 and reaches the silicon substrate 1, and that the electrode 15 is formed on the surface of this region 14. 16 and the substrate support 8 are electrically connected by the thin metal wire 16, and the transistor element T is bonded to the substrate support 8 using an adhesive 17 such as epoxy resin. There are four points.

That is, in such a structure, instead of the conventional bonding of semiconductor substrates using a noble metal layer, a method of bonding semiconductor substrates using an inexpensive adhesive made of resin is used.

Incidentally, the transistor element shown in FIG. 2 is formed through a wafer process shown in FIG. 3. First, the third
Figure a shows an epitaxial wafer in which a high resistivity epitaxial layer 2 is formed on a silicon base 1.
A +5i02 film 6 is formed on two sides, and a window 18 for impurity diffusion is opened in this 8i02 film 6.

Impurities are diffused through the window 18 from the surface side of the epitaxially processed silicon substrate 1 which has undergone the above treatment.
The penetrating layer 14 is formed to a depth of up to [Fig. 3b]
After that, the base is extracted by the same selective diffusion process as before.
The emitter region 3 is formed in sequence (FIG. 3C).

Note that the impurity concentration of the penetration layer 14 is 1017 to 10
It is formed by diffusing the same type of impurity as the wafer ψ at a concentration of 21 cm-3. By forming this penetrating layer 14, the collector electrode can be formed on the front side of the wafer, and there is no need to take the electrode from the back side of the wafer f.

Following this step, electrodes 6, 7.degree. 15 are formed for the three regions of the base, emitter and collector in the same manner as in the conventional method. At this time, the collector electrode 16 is formed on the surface of the penetrating layer 14 as shown (FIG. 3d). After the above processing, wafer 4 is finally cut using a laser cutter or die.
The transistor element is completed by cutting along the cutting lines shown by the X--X line and the X.--X. line using a cutting tool or the like.

The transistor elements obtained in this way are used to form a transistor element assembly structure, but when assembling, epoxy adhesive is used to adhere to the substrate without using gold foil or gold evaporation on the back side. do. Then, the emitter, base, and collector leads are connected to their respective electrodes using thin wires made of aluminum or the like, and the transistor is completed by sealing with resin.

As is clear from the above description, according to the present invention, since no precious metals such as gold and silver, which were conventionally required, are used, material costs can be significantly reduced. Note that when using the transistor element of the present invention, the number of metal wires increases by one compared to the conventional one, and the number of man-hours for connecting these increases, but the increase in material costs due to the increase in the number of metal wires is minimal. In addition, the increase in the number of man-hours for connecting thin metal wires can be realized with almost no effect on cost, as automation of manufacturing technology has progressed significantly.
Furthermore, since the transistor element of the present invention can be bonded to the substrate support at a low temperature, the current amplification factor hf due to assembly can be reduced.
Not only is there an effect that there is almost no change in e, but there is also an effect that the penetrating layer acts as a channel cutting layer.

[Brief explanation of drawings]

Figure 1 is a sectional view showing the structure of a conventional transistor, Figure 2 is a cross-sectional view showing the structure of a conventional transistor.
The figure is a sectional view showing the structure of the transistor of the present invention, and FIG. 3 axd is a diagram for explaining the manufacturing process of the transistor element portion shown in FIG. 2. DESCRIPTION OF SYMBOLS 1...Silicon base, 2...Epitaxial layer, 3...Base region, 4...
Emitter region, 6...5i02 film, 6,7,1
6... Electrode, 8... Substrate support, 9.
... Adhesive brazing material layer, 1o ... Base lead, 11 ... Emitter lead, 12, 13, 1
6...Thin metal wire, 14...Penetration layer, 1
7...Epoxy resin for adhesion. Name of agent: Patent attorney Toshio Nakao and 1 other person
1 Country Map 2

Claims (2)

[Claims] (1) A transistor element in which a base region is formed in a high resistivity epitaxial layer of the same conductivity type formed on a silicon substrate of one conductivity type, and an emitter region is further formed in the same base region. A region with a high impurity concentration of one conductivity type that penetrates the epitaxial layer and reaches the silicon substrate is formed in the outer peripheral portion of the epitaxial layer, and a collector electrode is formed on the surface of the region, and base and emitter electrodes are formed in the base and emitter regions. A transistor element characterized in that: (2) A transistor element in which a space region is formed in a high resistivity epitaxial layer of the same conductivity type formed on a silicon substrate of one conductivity type, and an emitter region is further created in the same base region. A region with a high impurity concentration of one conductivity type that penetrates the epitaxial layer and reaches the silicon substrate is formed on the outer periphery of the epitaxial layer, and a collector electrode is formed on the surface of the region, and base and emitter electrodes are formed on the base and emitter regions. The transistor element formed with the above is bonded to a substrate support connected to the collector lead using an adhesive, and the base, the emitter electrode, the base lead and the emitter lead are bonded between the collector electrode and the substrate support. A transistor device characterized in that each of the parts is connected by a thin metal wire.