JPS58130543A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide an N type inversion layer in the neighborhood of the substrate surface and a P type diffused layer thereunder, by implanting Ga ions into a fixed part of the N type Si substrate resulting in diffusion. CONSTITUTION:An Si3N4 mask 9 is applied on the N type Si substrate 8, thus the implantation layer 12 for Ga ions 11 is formed, and then Ga is diffused from the layer 12 into the substrate 8 at 1,150 deg.C in dry N2 resulting in the formation of the N type inversion layer 13 in the neighborhood of the surface of the substrate 8 and the P type layer 14 thereunder. The inversion layer 13 is generated by the spread of Ga from the Si substrate surface in the diffusion process and the crystal defect due to the implantation, and has different characteristics according to implantation and diffusion conditions of the N type inversion layer. For example, if the amount of Ga implantation is much, the N type carrier in the layer 13 is much; if the diffusion time increases, the inversion layer exsists further deeper. By this constitution, the density and the depth are easily controlled with good accuracy, and thus a P layer can be buried. Since a buried resistance layer and an electrode region can be formed by a simultaneous diffusion, and there is an N type inversion layer on the resistance layer, they have advantage such as not under influence of contaminated ions from the outside.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention makes full use of gallium ion implantation and diffusion methods to precisely form p-type buried regions and resistance regions ranging from low to high concentrations in an n-type silicon substrate. Concerning a manufacturing method for a semiconductor device that can be manufactured by a conventional method for forming a p-type buried layer in an n-type silicon substrate, a combination of selective diffusion treatment of p-type impurities and growth treatment of an n-type epitaxial layer is widely used. ing.

1 to 3 are diagrams showing the steps of forming a p-type buried region by a conventional method.

First, as shown in FIG. 1, a silicon dioxide film 2 is formed on the surface of an n-type silicon substrate 1, and the silicon dioxide film in a portion 3 where a buried region is to be formed is removed. A p-type impurity, for example, boron, is diffused by diffusion treatment in an oxidizing atmosphere to obtain a p-type diffusion layer 4.

Next, after removing all the silicon dioxide film formed on the surface of the silicon substrate 1, as shown in FIG.
It is buried between the type silicon substrate l and the n type epitaxial layer 5.

However, in order to form the n-type epitaxial layer 51, a silicon compound such as silicon tetrachloride or silane is mixed with hydrogen or hydrogen-containing nitrogen gas.
A chemical reaction is carried out at around 00 to 1200°C.

Therefore, when forming the nJJ epitaxial layer 5, boron diffuses from the pm diffusion layer 4 into the n-type epitaxial layer 5, and a so-called autodoping phenomenon that affects the impurity concentration of the nJ epitaxial layer 5 occurs.

Furthermore, if the thickness of the n-type epitaxial layer 5 is required to be extremely thin, about 1 μm, the control accuracy is lower than the control accuracy of the boron diffusion, so the n-type epitaxial layer 5 of the desired thickness is Formation of layer 5 is difficult;
There were problems such as poor film thickness uniformity.

An object of the present invention is to solve the above-mentioned problems of the conventional method for forming a p-type buried region, and to provide a method for manufacturing a semiconductor device by forming a p-type buried region using gallium ion implantation and diffusion. There is a particular thing.

In order to achieve the above object, the present invention implants potassium ions into a predetermined portion of an n-type silicon substrate and diffuses gallium to form an n-type inversion layer near the surface of the silicon substrate and a p-type inversion layer below the inversion layer. By utilizing the fact that a type diffusion layer is formed, this p-type diffusion layer is used as a buried region.

As shown in FIG. 4, when potassium ions are implanted into an n-type silicon substrate and potassium is diffused, an n-type inversion layer 6 is formed near the surface of the silicon substrate, and a p-type layer 6 is formed below the n-type inversion layer 6. A diffusion layer 7 is formed.

It is thought that the formation of this n-type inversion layer 6 is caused by an interaction between crystal defects in the silicon substrate caused by gallium ion implantation and dissipation of gallium from the silicon substrate surface. The number of electrically active carriers in the n-type inversion layer 6 is proportional to the gallium ion implantation violet.

Furthermore, the p-type diffusion layer 7 under the n-type inversion layer 6 is formed by ordinary gallium diffusion.

At this time, the depths xl and x3 of the n-type inversion layer 6 and the p-type diffusion layer 7 from the silicon substrate change as shown in FIG. 5 depending on the diffusion time.

Furthermore, if gallium ions are implanted into the silicon substrate throughout the second II, and then gallium is diffused,
The dissipation of gallium from the silicon substrate is suppressed, and the implanted gallium is effectively diffused in the silicon substrate without forming an n-type inversion layer, forming a p-type diffusion layer 7 under the n-type inversion layer 6. Forming a deep p-type diffusion layer with a higher concentration.Hereinafter, the present invention will be explained using an example in which a p-type buried region and a resistance region were formed by gallium ion implantation and diffusion. Detailed explanation of.

6 to 8 are process diagrams for forming a p-type buried layer in an n-type silicon substrate by the manufacturing method of the present invention. First, as shown in FIG. - On the surface of the secondary n-type silicon substrate 80, a silicon nitride film 9 with a thickness of 1 μm is formed using a normal vapor phase chemical reaction method, and a portion 10 where a buried layer is to be formed is formed using a normal photoetching method. The silicon nitride film was removed.

As shown in FIG. 7, gallium ions 11
with an implant energy of 150 KeV and 1x I Q I
I ion/cIn! Ion implantation was performed to form a gallium ion implantation layer 12f on the silicon substrate 8.

Next, as shown in FIG. 8, diffusion is performed at 1150 t' for 30 minutes in a dry nitrogen atmosphere to diffuse the gallium in the gallium implanted layer 12 into the silicon substrate 8, and to diffuse the gallium in the vicinity of the surface of the silicon substrate 80. depth is 0.6μmq)
The n-type inversion layer 13 is formed in the n-type silicon substrate 8 under the n-type inversion layer 13 at a depth of 5.6 mm from the surface of the silicon substrate 80.
A p-type diffusion layer 14 having a thickness of μm was formed.

The formation of this n-type inversion layer is thought to be caused by the dissipation of gallium from the silicon substrate surface during the diffusion process and by crystal defects in the silicon substrate caused by implantation, and depending on the implantation conditions and diffusion conditions. , it was confirmed that the characteristics of the n-type inversion layer were different.

For example, when the amount of gallium ions implanted is increased, the number of n-type carriers present in the n-type inversion layer increases9.
As shown in the figure, as the diffusion time increases, the n-type inversion layer becomes deeper.

In the p-type buried layer thus formed, the implantation amount is accurately controlled by ion implantation, and its reproducibility and uniformity are significantly improved compared to conventional methods.

Ninth, the depth of the n-type inversion layer and the depth of the p-type buried layer can be controlled by the diffusion conditions, for example the diffusion time. In other words, according to the method of the present invention, the sheet resistance of the p-type buried region It was confirmed that it was possible to control the ion implantation amount in the range of 200 Ω/hole to 50 Ω/hole by controlling the ion implantation amount and the diffusion temperature time.

The method of the present invention is applicable to various semiconductor devices, and a case in which a resistor is built into a bipolar semiconductor integrated circuit as another embodiment of the present invention will be described in detail with reference to the drawings below. do.

FIG. 9 to FIG. 13 are diagrams showing the manufacturing process.

First, as shown in FIG. 9, the fcn type epitaxial layer 16 formed on the surface of the p-type silicon substrate 15 is separated into islands by the p-type isolation region 17, and then the substrate surface is coated with a vapor phase chemical. The film thickness formed by the reaction method is 29
A portion 19 of the silicon nitride film 18 having a thickness of 100 nm and which forms a resistor was removed by a conventional photoetching method.

Next, as shown in FIG. 10, a portion 21 for forming an electrode and a portion 19 for forming a resistor of a silicon oxide film 20 having a thickness of 0.5 μm formed by a vapor phase chemical reaction method on the surface of the substrate. was removed by a normal photoetching method.Next, as shown in FIG. 11, the above substrate was subjected to I
1 G "jon15/crn" ion implantation,
In the portion 21 where the electrode is to be formed, the silicon nitride film 18
An implantation layer 23 of gallium ions 22 was formed in the n-type epitaxial layer 16 through the step, and an implantation layer 24 was formed in the n-type epitaxial layer 16 in the portion 19 where the resistor was to be formed.

Next, as shown in FIG. 12, 1
Diffusion at 150° C. for 30 minutes to form electrodes 21
In order to prevent dissipation of gallium in the implantation layer 23 from the surface of the Ni epitaxial layer 16 through the silicon nitride film, a high concentration gallium diffusion layer 25 with a diffusion depth of e, 2 μm is formed, and a resistor In the part 19 forming the
Gallium in the implanted layer 24 forms an n-type epitaxial layer 160.
Dissipated from the surface and affected by nine defects caused by implantation, the surface portion of the n-type epitaxial layer 160 has a depth of 0.5
An n-type inversion layer 26 with a thickness of 5.5 μm is formed under the inversion layer 26, and a 5.5 μm mop-type region 27 is formed by diffusion of gallium.
was formed, and then a 0.05 μm silicon oxide film 28 was formed by thermal oxidation.

Thereafter, as shown in FIG. 13, the silicon nitride film on the electrode portion 21 was removed with hot phosphoric acid, and 29.30 t of aluminum electrodes were formed by a normal electrode forming method.

The gallium diffusion layer 25 thus obtained was used as an electrode region, and the p-type region 27 under the n-type inversion layer 26 was used as a buried resistance layer.

At this time, the sheet resistance of the buried resistance layer 27 is approximately 1.2
It was KΩ/mouth.

By performing such a process using the present invention, the resistive region and the electrode region can be formed by simultaneous diffusion, making the process extremely simple, and since the resistive region uses a buried layer, This is extremely advantageous since it is possible to obtain a highly reliable resistor that is not affected by contaminant ions in the surface protective film 2B or ions generated from the sealing resin.

As is clear from the above explanation, according to the method of the present invention, all the problems that were unavoidable in the conventional method of forming a p-type buried region using a combination of selective diffusion method and epitaxial crystal growth method are eliminated. Furthermore, the p-type buried region is not simply formed only by ion implantation and diffusion, but its concentration and depth can be accurately controlled.

In addition, in forming the resistance region, the buried resistance region and the electrode region can be formed by simultaneous diffusion, which greatly simplifies the process.
Since it is not affected by external contaminant ions, etc., it has the advantage of providing a highly reliable resistor.

[Brief explanation of the drawing]

Figures 1, 2, and 13 are cross-sectional views showing how a p-type buried region is formed by the conventional method, and Figure 4 is a cross-sectional view showing an n-type inversion layer and a p-type buried region formed by the method of the present invention. 5 is a diagram showing the distribution of carriers in the layer, FIG. 5 is a diagram showing the depth from the substrate surface of the n-type inversion layer and the r-type buried layer formed by the method of the present invention, FIGS. Figure 8 is a cross-sectional view showing the state in which a p-type buried region is formed by the method of the present invention, Figure 9, Figure 1θ, Figure 11, Figure 12, and Figure 13 are a cross-sectional view showing the state in which a p-type buried region is formed by the method of the present invention. It is a process sectional view showing a state. 1. N-type silicon substrate, 2, 20.28... Silicon oxide film, 3, 1o... Portion for forming buried layer, 4, 14.27... P-type diffusion region, 5. 16...
nWi epitaxial layer, 6... carrier distribution in n-type inversion layer, 7... carrier distribution in p-type buried layer, 9
．． 18...Silicon nitride film, 11.22...Gallium ion% 12,24...Ion implantation layer, 13
26... N-type inversion layer, 15... P-type silicon substrate, 17... P-type isolation region, 19... Portion for forming a resistor, 21... Portion for forming an electrode, 2
3... Gallium implanted layer implanted through the silicon nitride film, 25... P-type diffusion layer by gallium diffusion, 2
9.30... Electrode. Agent Patent Attorney Toshiyuki Usuda

Claims (1)

[Claims] 1. After forming a first film on the surface of an n-type silicon substrate and removing the first film in a predetermined portion, Gallium ions are implanted into the first film other than the portion of the silicon substrate, and then heat treatment is performed to diffuse the gallium implanted into the predetermined portion of the silicon substrate. Manufacturing a semiconductor device characterized in that a type inversion layer is formed on a surface portion of a silicon substrate, a p-type region is formed in an n-type silicon substrate under the n-type inversion layer, and the p-type region is used as a buried region. Method. 2. Form the first film on the surface of the silicon substrate, remove the first film in a portion to be a resistor, and then remove the first film on the surface of the silicon substrate.
After forming a film and removing the second film in the resistor and electrode portions, the second film other than the resistor and electrode portions and under the first film in the electrode portions are removed. On the silicon substrate and the silicon substrate of the above resistor part,
Gallium ion implantation is performed, followed by heat treatment to diffuse the gallium implanted into the silicon substrate.
In the resistor part of the silicon substrate, the buried region according to claim 1 is used as a resistor region, and in the electrode part of the silicon substrate, a highly doped p-type region is formed, and the high concentration Is it possible to make the pm region the electrode region? :4! A method for manufacturing a semiconductor device according to claim 1. 3. The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the first O@ is selected from a silicon nitride film and the alumina oxide film. 4. The method of manufacturing a semiconductor device according to claim 1 or 2, wherein the second film is selected from a silicon oxide film, a phosphosilicate glass film, and a resist film.