JPS58127768U - Still image display device - Google Patents

Still image display device

Info

Publication number
JPS58127768U
JPS58127768U JP2622382U JP2622382U JPS58127768U JP S58127768 U JPS58127768 U JP S58127768U JP 2622382 U JP2622382 U JP 2622382U JP 2622382 U JP2622382 U JP 2622382U JP S58127768 U JPS58127768 U JP S58127768U
Authority
JP
Japan
Prior art keywords
still image
image display
display device
images
processing unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2622382U
Other languages
Japanese (ja)
Inventor
和田 隆吉
俊一 中村
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP2622382U priority Critical patent/JPS58127768U/en
Publication of JPS58127768U publication Critical patent/JPS58127768U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第一1図は従来の静止画表示装置を示すブロック図、第
2図はこの考案の一実施例による静止画表“ 4   
  3″ (([ t’ii    t’r 水装置を示すブロック図である。 1はアンテナ、2はチューナ、3は中間周波増巾回路、
4は抜き取り回路、5はバッファメモリ、6は中央処理
装置(CPU)、7はパターンメモリ、8はカラーメモ
リ、9はCPUパスライン、1〇−は静止画番組選択装
置、11は読出し制御回路、12i出力インタ一フエー
ス回路、13はブラウン管、14は読出し専用メモリ、
15はワークメモリ、16は映像増巾回路、17体モニ
タ装置、18は接続装置である。 第1図 16    12   t3− /                /−」]// 1
Figure 11 is a block diagram showing a conventional still image display device, and Figure 2 is a still image table according to an embodiment of this invention.
3'' (([ t'ii t'r It is a block diagram showing a water device. 1 is an antenna, 2 is a tuner, 3 is an intermediate frequency amplification circuit,
4 is a sampling circuit, 5 is a buffer memory, 6 is a central processing unit (CPU), 7 is a pattern memory, 8 is a color memory, 9 is a CPU pass line, 10- is a still image program selection device, 11 is a readout control circuit , 12i output interface circuit, 13 a cathode ray tube, 14 a read-only memory,
15 is a work memory, 16 is a video amplification circuit, 17 is a monitor device, and 18 is a connection device. Fig. 1 16 12 t3- / /-''] // 1

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロプロセッサ−等の中央演算処理装置を主制御装
置として使用静止画を表示する静止画表示装置において
、メモリーのアドレツセング、読み出し、書き込み、入
出力ポートの設定が、・キ一群により行え、且つその内
容を表示素子で表示できるモニタ装置を、外部がら接離
自在とする接続装置を設けたことを特徴とする静止画表
示装置。
In a still image display device that displays still images using a central processing unit such as a microprocessor as the main control device, memory addressing, reading, writing, and input/output port settings can be performed using a group of keys, and the contents thereof. What is claimed is: 1. A still image display device comprising a connection device that allows a monitor device capable of displaying images on a display element to be attached to and detached from the outside.
JP2622382U 1982-02-22 1982-02-22 Still image display device Pending JPS58127768U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2622382U JPS58127768U (en) 1982-02-22 1982-02-22 Still image display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2622382U JPS58127768U (en) 1982-02-22 1982-02-22 Still image display device

Publications (1)

Publication Number Publication Date
JPS58127768U true JPS58127768U (en) 1983-08-30

Family

ID=30038182

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2622382U Pending JPS58127768U (en) 1982-02-22 1982-02-22 Still image display device

Country Status (1)

Country Link
JP (1) JPS58127768U (en)

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