JPS58125856A - Manufacture of lead frame provided with insulating plates - Google Patents

Manufacture of lead frame provided with insulating plates

Info

Publication number
JPS58125856A
JPS58125856A JP57007630A JP763082A JPS58125856A JP S58125856 A JPS58125856 A JP S58125856A JP 57007630 A JP57007630 A JP 57007630A JP 763082 A JP763082 A JP 763082A JP S58125856 A JPS58125856 A JP S58125856A
Authority
JP
Japan
Prior art keywords
insulating
lead frame
insulating plate
bar
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57007630A
Other languages
Japanese (ja)
Inventor
Koji Takebe
建部　光司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57007630A priority Critical patent/JPS58125856A/en
Publication of JPS58125856A publication Critical patent/JPS58125856A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain the lead frame provided with the insulating plates having high precision and favorable workability by a method wherein an insulating bar having the prescribed width and length and having cut grooves at the neighborhood of the boundaries of the equipping parts to the lead frame is prepared to be fixed to the equipping parts interposing a bonding agent between them, and the parts of the insulating bar between the adjoining connecting parts are cut to be removed. CONSTITUTION:Width of the insulating bar 14 of ceramic plate is slghtly narrower than the tabs 5 of the lead frame 1, and length is the same with the frame 1 forming a series. Metalized layers 15 and solder layers 16 are stacked on the surface and back of the bar 14 at the parts corresponding to the tabs 5, and the V-shaped grooves 17 are formed in the lateral direction of the bar 14 on the outsides of the solder layers 16. The bar 14 is stacked on the line of the tabs, and the bar 14 is soldered 16 to the tabs. Then the frame is put on a base 19, the insulating bar 14 is pressed with pins 20, and pins 21 are pushed up from holes in the base 19 to break off the insulating plate parts between the tabs by the grooves 17. Accordingly, the lead frame fixed with the insulating plates 10 to the tabs 5 of the lead frame 1 is completed, and the lead frame can be manufactured having favorable equipping precision of the insulating plates and moreover having favorable workability.

Description

【発明の詳細な説明】 本発明は絶縁板付リードフレームの製造方法に関する。[Detailed description of the invention] The present invention relates to a method for manufacturing a lead frame with an insulating plate.

絶縁型半導体装置の組立には絶縁板付リードフレームが
用いられる。たとえば、絶縁型トランジスタ（以下単に
トランジスタと称す。）の組立にあっては、第１図で示
すような方法によって製造した絶縁板付リードフレーム
が用いられる。すなわち、リードフレーム１は薄い金属
板をバＪ−ニングして製造され、３本の平行に延在する
リード２〜を有している。各リード２の外端は枠３に固
定されるとともに、内端近傍は前記枠３と平行に延びる
ダム４で支持されている。このダムはトランジスタ組立
時のモールドレジンの流出を防止する役割を果たす。両
側の２本のり−ド２はエミッタリード、ベースリードと
なり、ダム４からその内端は数鵬突出している。中央の
リードはコレクタリードとなる。このため、その内端に
はベレット（回路素子）を固定するためのタブ５が設け
られ℃いる。そして、両側の２本のリード２はその内端
をタブ５の一儒近傍に臨ませている。また、タブ５はリ
ード２の延長上に長く延在してその先端に取付部６を形
作りている。この取付部６には取付孔７が設けられ、完
成品となったトランジスタを固定する際用いられる。さ
らに、散村部６の両側は前記枠３と平行になる枠８で支
持されている。A lead frame with an insulating plate is used to assemble an insulated semiconductor device. For example, in assembling an insulated transistor (hereinafter simply referred to as a transistor), a lead frame with an insulating plate manufactured by the method shown in FIG. 1 is used. That is, the lead frame 1 is manufactured by banning a thin metal plate, and has three leads 2 extending in parallel. The outer end of each lead 2 is fixed to a frame 3, and the vicinity of the inner end is supported by a dam 4 extending parallel to the frame 3. This dam serves to prevent mold resin from flowing out during transistor assembly. The two leads 2 on both sides serve as an emitter lead and a base lead, and their inner ends protrude from the dam 4 by several inches. The center lead becomes the collector lead. For this purpose, a tab 5 for fixing the pellet (circuit element) is provided at the inner end thereof. The two leads 2 on both sides have their inner ends facing close to one end of the tab 5. Further, the tab 5 extends long on the extension of the lead 2, and forms a mounting portion 6 at its tip. This mounting portion 6 is provided with a mounting hole 7, which is used for fixing the completed transistor. Further, both sides of the scattered village portion 6 are supported by frames 8 parallel to the frame 3.

このような単位リードパターン９は粋８，９によって定
間隔に配設されて、所定長さのリードフレーム（一連の
リードフレーム）を形作っている。Such unit lead patterns 9 are arranged at regular intervals by the leads 8 and 9 to form a lead frame (a series of lead frames) of a predetermined length.

なお、このリードフレーム１では、前記タブ５に絶縁板
１０が固定されて絶縁板付’）　−ト”７Ｌ／−ム１１
となる。In addition, in this lead frame 1, an insulating plate 10 is fixed to the tab 5, and an insulating plate is attached.
becomes.

従来、絶縁板付リードフレーム１１の製造にありては、
あらかじめ絶縁板取何部となるタブ５よりもわずかに小
さな絶縁板１０を用意しておく。Conventionally, in manufacturing the lead frame 11 with an insulating plate,
An insulating plate 10 that is slightly smaller than the tab 5, which serves as the insulating plate recess, is prepared in advance.

この絶縁板１０はセラミック小片からなるとともに％表
裏面にそれぞれメタライズ層１２が設けられている。そ
こで、タブ５の上に半田ディスク１３を載置するととも
に、この半田ディスク１３上に絶縁板ｌＯを載せ、この
状態で一時的に半田ディスク１３を加熱して溶かして絶
縁板１ｏを固定して絶縁板付リードフレーム１１を製造
し工いる。This insulating plate 10 is made of a small piece of ceramic, and metallized layers 12 are provided on each of the front and back surfaces. Therefore, the solder disk 13 is placed on the tab 5, and the insulating plate lO is placed on this solder disk 13, and in this state, the solder disk 13 is temporarily heated and melted to fix the insulating plate 1o. A lead frame 11 with an insulating plate is manufactured and worked.

しかし、とのよ５な方法は、各タブ上に１個ずつ半田デ
ィスクおよび絶縁板を搭載するため、極めて作業性が低
く、絶縁板付リードフレームの製造コストが高くなる難
点がある。However, in the fifth method, one solder disk and one insulating plate are mounted on each tab, which has the drawback of extremely low workability and high production cost of the lead frame with insulating plate.

また、絶縁板は移動可能な半田ディスク上に載置するた
め、わずかの振動によっても動（可能性が高い。このた
め、位置ずれを生じて固定されることもあり、歩留も低
くなる欠点がある。In addition, since the insulating plate is placed on a movable solder disk, even the slightest vibration may cause it to move (it is highly likely).This may cause the position to shift and then be fixed, resulting in a low yield. There is.

したがりて、本発明の目的は絶縁板を精度よくリードフ
レームに固定するとともに１作業性の＾い絶縁板付リー
ドフレームの製造方法を提供することＫある。Accordingly, an object of the present invention is to provide a method for manufacturing a lead frame with an insulating plate which can fix an insulating plate to a lead frame with high precision and is easy to work with.

このような目的を達成するために本発明は、絶縁板取付
部を有する単位リードパターンを少なくとも１列に配列
してなるリードフレームの各絶縁板取付１１ＫＩＩ合材
を介して絶縁板を固定する絶縁板付リードフレームの刺
造方法において、あらかじめ、絶縁板取付部の幅と略同
じ幅でかつ前記リードフレームの長さと略同じ長さの絶
縁棒を用意しておくとともに、前記各絶縁板取付部およ
びまたは絶縁［取付部に対面する絶縁棒の被接合部分に
接合材な被着させておく工程と、前記絶縁棒な各絶縁板
取付部上に被接合部分が対面するように重ね合せた後、
一時加熱して接合材ｖｉｌｌＩ融させ絶縁棒を絶縁板取
付１ｓＫ固定する工程と、隣接する絶縁板間の絶縁棒部
分を切断除去する工程と、を有するものであり、前記絶
縁棒にありてはリードフレームの各絶縁板取付部から外
れる境界近傍には境界に沿って切断用の溝が設けられ１
いるものであって、以下実施例により本発明を説明する
。In order to achieve such an object, the present invention provides an insulating plate for fixing an insulating plate through a KII composite material for each insulating plate attachment of a lead frame in which unit lead patterns each having an insulating plate attachment part are arranged in at least one row. In the method for embroidering a lead frame with a plate, an insulating rod having a width substantially the same as the width of the insulating plate mounting portion and a length substantially the same as the length of the lead frame is prepared in advance, and each of the insulating plate mounting portions and or insulation [a step of applying a bonding material to the part to be joined of the insulating rod facing the mounting part, and after superimposing the part to be joined on each insulating plate mounting part of the insulating rod so as to face each other,
The method includes a step of temporarily heating to melt the bonding material and fixing the insulating rod to the insulating plate, and a step of cutting and removing the insulating rod portion between adjacent insulating plates, and the insulating rod has the following steps: A cutting groove is provided along the boundary near the boundary where the lead frame comes off from each insulating plate attachment part.
The present invention will be explained below with reference to Examples.

第２図（ａｔ〜（ｃｌは本発明の一実施例による絶縁板
付リードフレームの製造方法を示す斜視図である。FIG. 2 (at to (cl) are perspective views showing a method of manufacturing a lead frame with an insulating plate according to an embodiment of the present invention.

第２図（ａｌに示すように、絶縁型トランジスタ組立用
のリードフレーム１と細長薄板からなる絶縁棒１４をあ
らかじめ用意する。リードフレーム１は第１図のリード
フレームｌと同一であることから説明を省略し、符号は
その１１用いることにする。絶縁棒１４はセラミック板
からなり、その幅はリードフレームｌのタブ（絶縁板取
付部）５の１１（Ｖ−ド２の延在する方向）よりもわず
かｋｃ狭くなっている。オた、長さは一連のリードフレ
ーム１の長さと略同じとなっている。そして、タブ５に
対応する絶縁棒１４の表裏面にはメタライズ層１５が設
けられ、第３図で示すように、このメタライズ層１５上
には半田１１１１１６が形成されている。さらに１この
半田膜の外ｉｉａ＜タブから外れる境界近傍）ＶＣは断
面が７字状となる溝１７が設けられている。この溝１７
は絶縁棒１４の表裏面に設けられるとともに、絶縁棒１
４の幅員方向に沿って延在している。そして、所足以上
の外力な加見れは、絶縁棒１４はこの溝１７の部分で割
れて分断するようになっている。As shown in FIG. 2 (al), a lead frame 1 for assembling an insulated transistor and an insulating rod 14 made of an elongated thin plate are prepared in advance.The lead frame 1 is the same as the lead frame l in FIG. will be omitted and the reference numeral 11 will be used.The insulating rod 14 is made of a ceramic plate, and its width is equal to 11 of the tab (insulating plate attachment part) 5 of the lead frame l (in the direction in which the V-dore 2 extends). Furthermore, the length is approximately the same as the length of the series of lead frames 1.Furthermore, a metallized layer 15 is provided on the front and back surfaces of the insulating rod 14 corresponding to the tab 5. As shown in FIG. 3, solder 111116 is formed on this metallized layer 15.Furthermore, 1 VC is a groove whose cross section is a figure 7 shape. 17 are provided. This groove 17
are provided on the front and back surfaces of the insulating rod 14, and the insulating rod 1
It extends along the width direction of 4. If the external force exceeds the required level, the insulating rod 14 will break and be separated at the groove 17.

つｌに、絶縁板付リードフレームの組立について説明す
る。第２図（ｂｌに示すように、リードフレームｌの一
列のタブ列上に絶縁棒１４を重ね合せ、一時的に加熱し
て半田膜１６な溶かし、第４図に示すよ５に半田接合層
１Ｂで絶縁棒１４ｔ−タブ５に固定する。この際、絶縁
棒１４のそれぞれの下層の半田膜１６が対応する単位リ
ードパターン９のタブ５にずれることなく重なるように
する。また、絶縁棒１４はある穐度重いことから、一度
タプ５上に載せると、少し位の振動では動くことがなく
、従来のような位置ずれが生じ難い。First, the assembly of the lead frame with an insulating plate will be explained. As shown in FIG. 2 (bl), the insulating rod 14 is superimposed on one row of tabs of the lead frame l, and the solder film 16 is melted by heating temporarily, and the solder bonding layer 5 is formed as shown in FIG. 4. 1B, fix the insulating rod 14t to the tab 5. At this time, make sure that the lower solder film 16 of each insulating rod 14 overlaps the tab 5 of the corresponding unit lead pattern 9 without shifting. Since the tap 5 is relatively heavy, once it is placed on the tap 5, it will not move even with slight vibrations, and is unlikely to be misaligned as in the conventional case.

つぎに、第４図に示すようｋ、テーブル１９上に載置し
たリードフレームｌ上の絶縁棒１４を固定ビン２０で押
え１固定するとともに１テーブル１９に設けた孔から押
上ビン２１ｖ押し上げて、タブ間に延在する絶縁棒部分
を押し、絶縁棒１４を溝１７で破断させて、第２図（ｃ
ｌに示すように、絶縁板１（ｌリードフレーム１のタブ
５に固定した絶縁板付リードフレームＩＩｋ製造する。Next, as shown in FIG. 4, the insulating rod 14 on the lead frame l placed on the table 19 is fixed with the fixing pin 20, and the push-up pin 21v is pushed up through the hole provided in the table 19. Push the insulating rod portion extending between the tabs to break the insulating rod 14 at the groove 17, as shown in Fig. 2(c).
As shown in FIG. 1, an insulating plate 1 (l) A lead frame IIk with an insulating plate fixed to the tab 5 of the lead frame 1 is manufactured.

このような実施例によれば、絶縁棒１４の状態で一連の
リードフレームｌの各タブ５に絶縁板となる部分を接合
することから、位置合せが答易でかつ重量があることＫ
よっ℃動き難いことから、精度よく絶縁板ｌＯを固定す
ることができる。According to this embodiment, since the insulating plate portion is joined to each tab 5 of the series of lead frames 1 in the state of the insulating rod 14, alignment is easy and the weight is low.
Since it is difficult to move, the insulating plate IO can be fixed with high precision.

また、−回の搭載と一回の分断工程によって一連のリー
ドフレーム１の各タブ５に絶縁板１０ｔｌ′擾合するこ
とができることから、作業性が従来と比較して高くなる
。Further, since the insulating plate 10tl' can be assembled to each tab 5 of the series of lead frames 1 by carrying out the loading process twice and separating the lead frame once, the workability is improved compared to the conventional method.

なお、本発明は前記実施例に限定されない。たとえば、
絶縁板１０の下層の半田膜１６は上層の半田膜１６より
も融点を高くしておいて、絶縁板１０上に回路素子を取
り付ける際の熱によっても溶融しないようにしておけば
、回路素子取付時に絶縁板ｌＯの取付位置がずれない。Note that the present invention is not limited to the above embodiments. for example,
The solder film 16 on the lower layer of the insulating plate 10 has a higher melting point than the solder film 16 on the upper layer so that it does not melt even when the circuit elements are attached to the insulating plate 10, and the circuit elements can be mounted easily. At times, the mounting position of the insulating plate IO does not shift.

また、絶縁板１０上に半田ディスク、半田箔等あるいは
他の接合材を用いる組立構造用に対し又は、絶縁棒１４
の上面には半田膜を形成しないものを用い℃絶縁板付リ
ードフレームを製造する。Also, for assembled structures using solder disks, solder foil, etc. or other bonding materials on the insulating plate 10, or insulating rods 14
A lead frame with an insulating plate is manufactured using a lead frame with no solder film formed on the upper surface of the lead frame.

さらに、リードフレーム形状は他の形状でもよ〜ゝ・ 以上のように、本発明によれば、絶縁板を精度よくリー
ドフレームの絶縁板取付部に固定できるとともに、作業
性の高い絶縁板付リードフレームの製造方法を提供する
ことができる。Furthermore, the shape of the lead frame may be other shapes. As described above, according to the present invention, the insulating plate can be fixed to the insulating plate attachment part of the lead frame with high precision, and the lead frame with the insulating plate can be easily worked. A manufacturing method can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の絶縁板付リードフレームの組立方法を示
す斜視図、第２図（ａｔ〜（ｃｌは本発明の一実施例に
よる絶縁板付リードフレームの組立方法を示す斜視図、
第３図は同じく絶縁棒な示す一部の縦断面図、第４図は
絶縁棒の分断状態を示す説明図である・ １・・・ν〜ドフレーム、２・・・リード、５・・・タ
ブ、９・・・単位リードパターン、１０・・・絶縁板、
１１・・・絶縁板付リードフレーム、１２．１１・・メ
タライズ層、１４・・・絶縁棒、１６・・・半田膜、１
７・・・溝、１８・・・半田接合層。FIG. 1 is a perspective view showing a conventional method for assembling a lead frame with an insulating plate; FIGS.
Fig. 3 is a longitudinal sectional view of a part of the insulating rod, and Fig. 4 is an explanatory diagram showing the divided state of the insulating rod.・Tab, 9...Unit lead pattern, 10...Insulating plate,
11... Lead frame with insulating plate, 12.11... Metallized layer, 14... Insulating rod, 16... Solder film, 1
7...Groove, 18...Solder bonding layer.

Claims (1)

【特許請求の範囲】 １、絶縁板取付部を有する単位リードパターンを少なく
とも１列に配列してなるリードフレームの各絶縁板取付
部に接合材を介して絶縁板を固定する絶縁板付リードフ
レームの製造方法において、あらかじめ、絶縁板取付部
の幅と略同じ幅でかつ前記リードフレームの長さと略同
じ長さの絶縁棒を用意しておくとともに、前記各絶縁板
取付部およびまたは絶縁板取付１１ＳＫ対面する絶縁棒
の被接合部分に接合材な被着させておく工程と、前記絶
縁棒を各絶縁板取付部上に被接合部分が対面するように
重ね合せた後、一時加熱して接合材を溶融させ絶縁棒を
絶縁板取付部に固定する工場と、隣接する絶縁板間の絶
縁棒部分を切断除去する工程と、を有することを特′徴
とする絶縁板付リードフレームの製造方法。 ２、前記絶縁棒にあってはリードフレームの各絶縁板取
付部から外れる境界近傍には境界に沿って切断用の溝が
設けられていることを特徴とする特許請求の範囲第１項
記載の絶縁板付リードフレームの製造方法＠ ３、前記絶縁棒の被接合部分に対面する上面には接合材
が被着され又いることを特徴とする特許請求の範囲第１
項記載の絶縁板付リードフレームの製造方法。[Claims] 1. A lead frame with an insulating plate, in which an insulating plate is fixed to each insulating plate attaching part of the lead frame, which is formed by arranging unit lead patterns each having an insulating plate attaching part in at least one row, via a bonding material. In the manufacturing method, an insulating rod having a width substantially the same as the width of the insulating plate mounting portion and a length substantially the same as the length of the lead frame is prepared in advance, and each of the insulating plate mounting portions and/or the insulating plate mounting 11SK is prepared in advance. A step of applying a bonding material to the parts to be joined of the facing insulating rods, and stacking the insulating rods on each insulating plate attachment part so that the parts to be joined face each other, and then temporarily heating the parts to apply the joining material. A method for manufacturing a lead frame with an insulating plate, comprising: a factory for melting the insulating rod and fixing the insulating rod to an insulating plate attachment part; and a step for cutting and removing the insulating rod portion between adjacent insulating plates. 2. The insulating rod according to claim 1, wherein a cutting groove is provided along the boundary near the boundary where the insulating bar is detached from each insulating plate mounting portion of the lead frame. Method for manufacturing a lead frame with an insulating plate @ 3. Claim 1, characterized in that a bonding material is adhered to the upper surface of the insulating bar facing the portion to be bonded.
A method for manufacturing a lead frame with an insulating plate as described in .
JP57007630A 1982-01-22 1982-01-22 Manufacture of lead frame provided with insulating plates Pending JPS58125856A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57007630A JPS58125856A (en) 1982-01-22 1982-01-22 Manufacture of lead frame provided with insulating plates

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57007630A JPS58125856A (en) 1982-01-22 1982-01-22 Manufacture of lead frame provided with insulating plates

Publications (1)

Publication Number Publication Date
JPS58125856A true JPS58125856A (en) 1983-07-27

Family

ID=11671147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57007630A Pending JPS58125856A (en) 1982-01-22 1982-01-22 Manufacture of lead frame provided with insulating plates

Country Status (1)

Country Link
JP (1) JPS58125856A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102332444A (en) * 2011-06-16 2012-01-25 沈健 Semiconductor lead frame of whole matrix surface

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102332444A (en) * 2011-06-16 2012-01-25 沈健 Semiconductor lead frame of whole matrix surface

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