JPS58123615U - BTL amplifier - Google Patents
BTL amplifierInfo
- Publication number
- JPS58123615U JPS58123615U JP2081682U JP2081682U JPS58123615U JP S58123615 U JPS58123615 U JP S58123615U JP 2081682 U JP2081682 U JP 2081682U JP 2081682 U JP2081682 U JP 2081682U JP S58123615 U JPS58123615 U JP S58123615U
- Authority
- JP
- Japan
- Prior art keywords
- btl
- amplifier
- utility
- btl amplifier
- model registration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Amplifiers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図、第２図は従来のＢＴＬ増幅器の一例を示す回路
図、第３図は本考案の一実施例を示す回路図、第４図、
第５図、第７図、第８図、第９図−は本考案の各別の他
の実施例を示す回路図、第６図は第５図に示す実施例の
動作を説明するブロック図である。
ＩＮＩ、ＩＮ２・・・・・・入力端子、ＯＵＴ １ 、
ＯＵＴ ２・・・・・・出力端子、ＤＦ ｌ〜ＤＦ５
・・・・・・差動増幅器、ＰＡＩ、ＰＡ２・・・・・・
５ＥＰＰ出力回路。
−゛1 and 2 are circuit diagrams showing an example of a conventional BTL amplifier, FIG. 3 is a circuit diagram showing an embodiment of the present invention, and FIG.
5, 7, 8, and 9 are circuit diagrams showing other embodiments of the present invention, and FIG. 6 is a block diagram explaining the operation of the embodiment shown in FIG. 5. It is. INI, IN2... Input terminal, OUT 1,
OUT 2...Output terminal, DF l~DF5
・・・・・・Differential amplifier, PAI, PA2・・・・・・
5EPP output circuit. −゛
Claims (1)
段に配置された電圧増幅用トランジスタのベースまたは
エミッタへ出力端子間の中点電位を同相帰還することを
特徴とするＢＴＬ増幅器。 （２）実用新案登録請求の範囲第１項記載のものにおい
て、電圧増幅用の素子として電界効果トランジスタを用
いたことを特徴とするＢＴＬ増幅器。[Claims for Utility Model Registration], fl) A BTL characterized in that a midpoint potential between output terminals is fed back in-phase to the base or emitter of a voltage amplifying transistor arranged in the preceding stage of an output transistor constituting a BTL circuit. amplifier. (2) Utility Model Registration The BTL amplifier according to claim 1, characterized in that a field effect transistor is used as a voltage amplifying element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2081682U JPS58123615U (en) | 1982-02-17 | 1982-02-17 | BTL amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2081682U JPS58123615U (en) | 1982-02-17 | 1982-02-17 | BTL amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58123615U true JPS58123615U (en) | 1983-08-23 |
Family
ID=30032961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2081682U Pending JPS58123615U (en) | 1982-02-17 | 1982-02-17 | BTL amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58123615U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0618673A2 (en) * | 1993-03-29 | 1994-10-05 | SANYO ELECTRIC Co., Ltd. | A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted and a power amplifier wherein a BTL drive circuit is driven by a half wave |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5051647A (en) * | 1973-09-07 | 1975-05-08 | ||
| JPS5397356A (en) * | 1977-02-04 | 1978-08-25 | Sony Corp | Transistor amplifier circuit |
-
1982
- 1982-02-17 JP JP2081682U patent/JPS58123615U/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5051647A (en) * | 1973-09-07 | 1975-05-08 | ||
| JPS5397356A (en) * | 1977-02-04 | 1978-08-25 | Sony Corp | Transistor amplifier circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0618673A2 (en) * | 1993-03-29 | 1994-10-05 | SANYO ELECTRIC Co., Ltd. | A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted and a power amplifier wherein a BTL drive circuit is driven by a half wave |
| EP0618673A3 (en) * | 1993-03-29 | 1995-12-06 | Sanyo Electric Co | A differential amplification circuit wherein a DC level at an output terminal is automatically adjusted and a power amplifier wherein a BTL drive circuit is driven by a half wave. |
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