JPS58123385A - Speed controller for motor - Google Patents

Abstract

PURPOSE:To eliminate the damage of a machine which is driven by a motor by outputting a motor stop command when one-phase signal of an encoder is displaced to special level so that the absolute value of a speed feedback amount becomes lower than the prescribed value. CONSTITUTION:The absolute value of a speed feedback amount NF is counted by an absolute value circuit 13A, and is compared by the prescribed value by a comparator 13B, which generates an output of one level when the prescribed level becomes larger than the absolute value of the NF. On the other hand, the output DP of a malfunction detector 11 is inputted as one input to an AND circuit 13C, and becomes one level when one phase becomes defective. As a result, a stop signal generator 13 generates a stop signal ST when the speed of a motor 2 becomes lower than the prescribed level. When the stop signal ST is generated, it opens a power switch, thereby stopping impression of the voltage to the motor 2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speed control device for an electric motor, and more particularly, the present invention relates to a speed control device for an electric motor, and more particularly, to control the speed by using a speed detector that is mechanically coupled to an electric motor and generates a two-phase pulse signal with a frequency proportional to the rotational speed of the electric motor. The present invention relates to a speed control device for an electric motor to be controlled.

As a motor speed detector, an incremental EN2-11-C (hereinafter referred to as an encoder) is used, which is mechanically coupled to the motor and generates a two-phase pulse signal of the next station wave number in proportion to the rotational speed of the motor. There is. A motor speed control device 11 using this encoder is shown in FIG.

In FIG. 1, it is an IVi encoder, which is mechanically coupled to the electric motor 2, and outputs two-phase pulse signals shown by A and B in FIG. 2 in order to know the direction of rotation. For example, this encoder has a rotating disk with slits around it,
It consists of a fixed disk that is provided on the output light side of the rotating disk and has a specific phase relationship (phase relationship of slits) with each other.

This encoder converts the output light coming from the slit positional relationship into an electrical signal and generates two pulse signals A and B. The pulse signals A and B are fixed to a specific phase relationship during forward rotation, and when rotating The number of pulses per unit time increases or decreases depending on the number of pulses.Even during reversal, there is a specific phase relationship for the reversal mode.This encoder detects both the direction of rotation and the rotation speed of the motor. 3 is a speed control circuit;
4 is a gate pulse generation circuit that provides gate pulses to the power converter 5, and the power converter 5 consists of a forward rotation thyristor converter 5A and a reverse rotation thyristor converter 5B.
phase AC power supply, 7 is the speed detection circuit, monostable circuit 7A, 7
B, 7C, 7D, OR circuit 7E, frequency-voltage converter 7
Consists of F. Further, 8 is a rotational direction determining circuit, which is composed of a D-type free-lag frog. 9 is a polarity circuit, and a code converter 9A inverts the polarity of the input analog signal.
.

It consists of analog gate circuits 9B and 9C.

Now, if the speed command value NC changes, the speed feedback amount N
A deviation occurs between F and F. The speed control circuit 3 calculates the firing phase α of the thyristor converter 5A (also Fi5BlO) according to the speed deviation, and sets the value to the gate pulse generation circuit 4.The gate pulse generation circuit 4 generates a pulse at a specified phase. As a result, the power converter 5 changes the voltage applied to the motor 2 and controls the speed of the motor 2. This change in rotational speed is detected by the encoder 1, and its output pulses A and ME change. .The pulse signal of the human face becomes the input to the monostable ports M7A and 7B.

As shown in FIG. 2, the monostable circuits 7A and 7B generate a pulse Pi at the 9 o'clock point in synchronization with the rise and fall of the human phase pulse signal. Similarly, B-phase pulse signals whose phases differ by about 90° are input to the monostable circuit 70°7D. Monostable circuits 7C and 7Dfl generate pulses Pt- in synchronization with the rising and falling edges of pulse signal B. monostable circuit 7
A to 7D] (Rus P inputs frequency - through OR circuit 7Et
It is input to voltage converter 7F. Frequency-voltage converter 7F
outputs an analog signal NA at the frequency of the pulse P.

The pulse signals A and B of the encoder 1 are input to a rotation direction determining circuit 8. The pulse signal A is applied to the data input Mizukori of the 7 lip-flop circuit and to the trigger input terminal T of the friend pulse signal BH.

The rotational direction determining circuit 8 sets the output CP to the @1'' level when the pulse signal A is at the 11'' level and the pulse signal B changes from the ``0#'' level to the @1'' level. Conversely, when pulse signal A is at O'' level and pulse signal B is
When the signal changes from the ``0'' level to the @1 level, the output CN becomes the ``1'' level. Now, assuming that pulse signal A is ahead of pulse signal B as shown in Figure 2 (a), when pulse signal A is at 11'' level, pulse signal B changes from @0'' level to @1# level. become. As a result, the output CP of the rotation direction determining circuit 8 becomes @1'' level, and it is determined that the rotation is normal rotation.On the other hand, when the nox signal B is ahead of the pulse signal A as shown in FIG. 2(b), , the output CP of the rotation direction discrimination circuit 8 is at the 10" level, and the output CN is @1".
level and is judged to be a reversal.

Using the analog signal NA and digital signals CP and CNt obtained in this way, the polarity circuit 9 converts the signed speed feedback amount (analog value 3NPK).
When signal CN is at 11" level, that is, for forward rotation, the analog gate circuit 9C is turned on, and NF=NA. Since the speed feedback amount NF is obtained via the analog signal NAH code converter 9, NF=-NA.

By repeating the above actions.

The speed of the electric motor 2 is controlled to match the speed command value NC.

However, when controlling the speed as described above, if one of the two-phase signals is biased to the ``1'' level or 10'' level due to encoder failure, the amount of speed feedback will be halved and the rotation direction will change. It becomes impossible to determine. For this reason, there is a risk that the electric motor will rotate in the opposite direction to the command, which may lead to accidents such as damage to equipment.

SUMMARY OF THE INVENTION An object of the present invention is to provide a reliable motor speed control device that can safely control the motor speed even if a one-phase pulse signal of a speed detector that outputs a two-phase pulse signal disappears. .

In the standby mode of the present invention, an abnormality in a one-phase pulse signal of a speed detector that outputs a two-phase pulse signal is detected by a pulse signal,
The purpose is to multiply the frequency of a normal pulse signal of another phase by an integral number and use it as a speed feedback amount to continue speed control.

Another feature of the present invention is that when the speed is controlled using a normal one-phase pulse signal, when the speed □ falls below a certain value, the motor is stopped with less shock.

Ru.

FIG. 3 shows the components of block S of the speed control device according to the invention.

In FIG. 3, the same symbols as those in FIG.
It is composed of 0A and an AND circuit 10B. 11 is an abnormality detection circuit, 12 is a gain change circuit, and 13 is a stop signal generation circuit 13.

The abnormality detection circuit 11 has a configuration as shown in FIG. 4, and includes monostable circuits 11A, IIB, IIC, IID, and an OR circuit 1.
1E, IIF, monostable circuit 11G.

11H, flip-flop circuit 111. IIJ.

AND circuit 11, 11L, ILM, 11N, OR circuit 110. It consists of LIP and flip-flop circuit 11Q.

The gain change circuit 12 includes an operational amplifier 12A and a resistor 12B.
, 12C, 1'2D, and an analog gate circuit 12B. The resistance values of the resistors IB-12D are the same, and the output DP of the gate circuit 12EH abnormality detection circuit 11 is 10.
” level.Also, the stop signal generation circuit 1
3 is absolute value circuit 13A1 comparator 13B and AND circuit 1
3C, and a stop command 5T-t- is generated.

The operation of the speed ys4 in FIG. 3 is the same as that in FIG. 1, and the power converter 5
determines the voltage applied to the motor 2 and controls the speed of the motor 2. What differs from FIG. 1 is the part where the velocity retention amount NFt- is obtained from the pulse signals A and B of the encoder 1. Now, a case where the output of encoder l is normal will be explained with reference to the operating waveforms shown in diagram kK5.

In the abnormality detection circuit 11 shown in FIG. 4, the pulse signal A of the encoder 1 is applied to monostable circuits 11A and IIB. The monostable circuits 11A and IIB generate pulses synchronized with the rising and falling edges of the pulse signal A, respectively. The output pulses of both monostable circuits 11A and 11B are logically summed by an OR circuit 11B to become a pulse FA. Similarly, from pulse signal B, monostable circuits 11C, 11D, OR circuit 11F
Pulse pBi hemorrhoids. Each No (Russ PA.

PB is added to monostable circuits 11G and 1IH1, synchronized with the falling edge of pulse FA and PB) (Russ QA, QBt
- get. (obtained in this way) (Russ QA and QB are flip-frog circuits of 11 construction.

This becomes a set pulse and a reset pulse of 11J.

Since the flip-flop circuit 111 has a pulse QA applied to its set terminal S and a pulse QBt applied to its reset terminal R, a square wave pulse RAPtl as shown in FIG. 5 is generated at its output terminal Q. , 7 lip circuit 11
1 is a square wave output ⇓AI'l which is obtained by inverting the phase of the square wave output RAP- from the output terminal Q.

Similarly, square wave pulses R and BPt are generated from the output terminal Q of the flip-flop circuit 11Ji, and square wave pulses RBNk are generated from the output terminal Q of the flip-flop circuit 11J.

The pulses RAP and PA thus obtained are logically ANDed by the AND circuit 11 and become the input of the OR circuit 110. In normal operation, the pulse PA goes to the "0" level and then goes to the pulse P, AP-1)161" level, so the output to the AND circuit 11 is always at the "0#" level. Similarly, since the output of the AND circuit 11L is also at the '0'' level, as a result, the output pulse SAi of the OR circuit 110
6-, which is at “0” level, AND circuit 11M
Since the Hahals RAM and FA are input to , the pulse RAN is 11 levels (Pulse RAP generates a pulse PA at @IO# level, so a pulse is also generated at the output of the AND circuit 11M.Similarly, the AND circuit 11N A pulse equivalent to the pulse FB is also generated at the output of the OR circuit 11P.As a result, the output of the OR circuit 11P is a pulse train SB as shown in FIG.
This becomes the Q reset pulse.

In this way, during normal operation, the flip-flop circuit 11
For Q, the pulse SA input to its set terminal S is always '0'
Since the pulse 88 is input to the reset terminal R at the # level, the Q terminal output DPfl is always at the 10'' level, and (the 11th child output DN is always at the 1'' level).

As a result, the 10,000 input signal DN of the AND circuit 10B of the rotation direction determination circuit 10 is at @1# level, so
The pulse signal B directly serves as a trigger for the flip-flop circuit 10A. As a precaution, the outputs CP and CN are generated in the same manner as in the operation shown in FIG. Also, since the output DP of the abnormality detection circuit 11 is at the 10'a level, the output STH'' of the AND circuit 13C of the stop signal generation circuit 13 is
0'' level, indicating a normal operating condition.Furthermore, since the analog gate (12EFi) of the detection gain changing circuit 12 is closed, the gain of this portion is 1.

As a result, the sign of the output NAO value of the speed feedback amount NFtI'i speed detection circuit 7 coincides with the expected value.

Assume that from such a normal state, an abnormal state occurs in which the pulse signal B is always at the "0" level as shown in FIG. It should be noted that among the abnormal state portions in FIG. 5, the waveforms shown by broken lines are normal operating waveforms.

Now, as shown in Figure 5, an abnormality occurs and the pulse signal becomes 102.
If the level remains, the pulse PB that should be generated at the rising edge of the pulse signal B (D) is not generated, and the pulse PA?r is generated at the falling edge of the pulse signal A. The outputs R and AP of the flip-flop circuit III are ""1#1# level is maintained. For this purpose, the AND circuit 11K generates an output pulse, and the output pulse is output from the flip-flop circuit 11 through the OR circuit 110t.
Q is given as a set pulse. As a result, the Q terminal output DP of the 7 lip-flop circuit 11Q becomes 11'' level, the analog gate circuit 12 opens, and the gain r1'i1 of the detection gain changing circuit 12 changes from 1 to 2. Since the output pulse B from the B phase of the output NAfl encoder l disappears, pulses are generated only at times synchronized with the rise and fall of the human phase pulse.From this, the motor 2 rotates at the same speed. However, in the present invention, the pulse frequency of the pulse NA is 1/2 of the normal one. Therefore, the output of the frequency-voltage converter 9 is also 1/2. Since the gain is doubled, the speed feedback amount NFld can be obtained as a voltage correctly proportional to the motor speed.

The above is a case where the pulse signal of the encoder 1 is at the @o- level, but FIG. 6 shows the operating waveforms in the case where the pulse signal is at the @1'' level.

In this case as well, after the abnormality occurs, only the set pulse SA of the flip-flop circuit 11Qi is input, and the output is always at the "1" level. Therefore, the case is the same as that described in FIG. 5.

- If the human face pulse signal A is no longer generated, a pulse is generated at the output of the AND circuit 11L, the flip-flop circuit 11Q'i is set, and the output DP is set to ``1''.
Similar processing is performed by setting the level.

In this way, according to the embodiment shown in FIG. 3, even if one of the two-phase signals of the encoder 1 is not obtained,
Since the speed detection method is changed so that the specific speed feedback amount NF is proportional to the speed of the electric motor 2, a normal operating state can be maintained for a long time.

Next, in FIG. 3, a stop signal generation circuit 13 is provided which generates a stop signal 8T when one phase m4 of the encoder l is biased to a specific level and the absolute value of the speed feedback amount NF becomes less than a certain value. ing. This stop signal generating circuit 13 prevents the rotation direction from being unable to be determined and the speed control operation to become impossible when one phase of the two-phase signal from the encoder 1 is lost.

Specifically, as long as the motor speed is running in the same direction, normal operation will be performed, and if the motor speed is reversed, the motor 1
Generates a signal to stop. The absolute value INF'l of the speed feedback amount NP is calculated by the absolute value circuit 13A, and compared with a constant value by the comparator 13B.

The comparator 13B generates an output of @l'' level when the constant value becomes greater than the absolute value INF'l.

On the other hand, the output D of the abnormality detection circuit 11 is input to the AND circuit 13C.
P is an input of 10,000, and when one phase is open, it becomes @1" level. As a result, the stop signal generation circuit 13 outputs a signal when the speed of the motor 2 falls below a certain value. A stop signal ST? is generated.

' 1 When the stop signal ST is generated, the t source side switch (not shown) is opened to stop the voltage application to the motor 2.

As described above, according to the embodiment shown in FIG. 3, even if one phase of the two-phase output signal of the encoder 1 is lost, the speed feedback amount NF operates in the same manner as at t'Lfc when a two-phase output is obtained. As long as the direction of rotation of the motor does not change, operation can be continued without any adverse effect on speed control.

Also, when the speed of the electric motor becomes low, it is determined that there is an abnormality.
Since a stop command is generated and the electric motor is stopped, the machine can be stopped safely and without damaging the machine driven by the electric motor.

In the embodiment shown in FIG. 3, the speed control circuit 3 is constructed from an analog circuit. If this part is configured with a digital arithmetic processing circuit such as a microcomputer, it becomes possible to detect the speed by counting the output pulses of the speed detection circuit 7 with a counter. Since the processing can be performed using computer software, the overall configuration becomes extremely simple, and the implementation of the present invention '1' becomes even easier.

As explained above, according to the present invention, even if the one-phase output of a speed detector that outputs two-phase pulse signals becomes abnormal,
The current control state can continue to be executed. Further, the electric motor can be safely stopped in a low speed state.

Although the above-mentioned embodiment is an example in which the speed detector is an incremental encoder, it is obvious that similar effects can be achieved if the speed detector generates a two-phase Norse signal.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing an example of a conventional motor speed control device, FIG. 2 is an operation waveform time chart of FIG. 1, and FIG. 3 is a block diagram showing an embodiment of the motor speed control device of the present invention. 4 is a circuit diagram of the abnormality detection circuit of FIG. 3, FIGS. 5 and 6, and an operation waveform time chart of FIG. 3. DESCRIPTION OF SYMBOLS 1... Encoder, 2... Electric motor, 11... Abnormality detection circuit, 12... Gain change circuit, 13... Stop signal generation circuit. Agent Patent Attorney Masami Akimoto

Claims (1)

[Claims] 1. A speed detector that outputs a two-phase pulse signal with a frequency proportional to the rotation speed of the motor, and a speed feedback value of the electric machine determined from the two-phase pulse signal of this speed detector. a feedback amount calculation means; a speed control means for controlling the speed of the motor based on the speed command value and the speed feedback value; and one phase pulse signal of the two-phase pulse signals of the speed detector is biased to a specific level Is this abnormality detection means different from the abnormality detection means that detects the abnormality that occurs? A speed control device for a constant electric motor, which is fully equipped with gain adjustment means for increasing the gain of the feedback amount calculation means when detected. 2. A speed detector that outputs a two-phase pulse signal with a frequency proportional to the rotational speed of the electric motor, a feedback amount calculation means for calculating a speed feedback value of the electric motor from the two-phase pulse signal of the speed detector, and a speed command value. and speed control means for controlling the speed of the motor based on the speed feedback value, and abnormality detection means for detecting an abnormality in which one phase pulse signal of the two-phase pulse signals of the speed detector is biased to a specific level. , gain adjustment means for increasing the gain of the feedback amount calculation means when the abnormality detection means detects an abnormality, and the abnormality detection means fully detects the abnormality, and the absolute value of the speed/feedback value has become below a certain value. A speed control device for an electric motor, comprising a stop command means for occasionally outputting a stop command for the A417 aircraft.