JPS58119281A - Control system for edition of video tape recorder - Google Patents

Abstract

PURPOSE:To perform the synthesis of a still picture, by storing one frame of the dynamic picture of two VTRs respective in two picture memories, reading out and synthesizing the frames and recording the result in the 3rd VTR. CONSTITUTION:A reference signal of an NTSC synchronizing signal generator 100 is applied to VTRs 3, 4, time base collectors 9, 10, and an NTSC encoder 8. Video signals of one frame of the VTRs 3, 4 become hue signals at NTSC decoders 6, 7 while being synchronized with the VTR write operation instructed at a CPU interface control section 104 and written in picture memories 101, 102 via A/D converters 105, 106. The data of the memories 101, 102 are inputted to an operation memory 103, synthesized and written in the memory 101 or 102. Thus, the synthesized picture is written in a VTR5 via an output multiplexer 107, a D/A converter 108, and an encoder 8 from the memory 101 or 102.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control system for editing a video tape recorder 9 (hereinafter referred to as VTR). Especially this invention.

Based on instructions from an electronic computer (hereinafter referred to as CPU).

It is recommended to capture one frame of the moving image on the first VTR and one frame of the moving image on the second VTR as a still image, and to record the composite of these still images on the third VTR. This provides a control method for VTR editing that can be performed.

Conventional VTR editing control methods generally have two VTRs that you want to edit.
In this method, a TR tape was set in one VTR, and a dedicated VTR editing device was used to selectively record only the desired moving image portion on the other VTR. In this method, a moving image is recorded on the other VTR. That is, in the conventional method described above, the VTR editing control method is intended for VTR moving images.

It does not have an image memory as a video signal holding means necessary for recording one frame (ie, one frame) of a moving image on one VTR as a still image on the other VTR. Therefore, the above conventional method has become indispensable for image processing of VTR images as image processing technology has improved in recent years.

This method is not suitable for controlling VTR editing in which one frame of a moving image is extracted as a still image.

Therefore, the applicant of the present invention has filed a separate application for a secondary system as a VTR editing control system that is optimal for extracting and recording one frame of a moving image as a still image. In this method, there is a VT connection between a computer (CPU) and two VTRs.
Connect the R image processing device.

A system is constructed in which a CPU can control two VTRs via the VTR image processing device. The VTR image processing device is equipped with an image memory into which a video signal corresponding to one frame of video of one VTR is written. Then, according to a command from the CPU, the video recorded on one VTR is taken out as a one-frame still image into the image memory, and the other VTR is made to record the still image taken out into the image memory. However, this method does not perform any data processing on one frame of the video signal taken into the VTR image processing device and records it on the other VTR, making it difficult to perform advanced VTR image processing such as compositing still images. is not suitable.

An object of the present invention is to extract one frame of a moving image from a first video tape recorder and one frame of a moving image from a second video tape recorder as still images, and to combine the extracted still images with each other. And the third video
To provide an optimal video tape recorder editing control system for tape recording.

According to the present invention, there is provided a video tape recorder editing control method for editing videos of first and second video tape recorders and recording them on a third video tape recorder, and a synchronization signal generator for providing a reference synchronization signal to each of the second video tape recorder;
a second image memory into which a video signal corresponding to one frame of video of the first video tape recorder is written; and an operation for synthesizing the contents of each of the first and second image memories. In accordance with instructions from the memory and the electronic computer, video signals corresponding to one frame of video of the first and second video tape recorders are written into the first and second image memories, respectively, and the calculation memory The result synthesized by
and a computer interface control unit capable of causing the third video to be recorded on the tape recorder, and according to instructions from the computer, the computer interface control unit records the synthesized result on the third video tape recorder. A video tape featuring
Recorder Editing Control Method % Formula % Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing a P-eating embodiment in which the present invention is applied to a television broadcast system based on the NTSC system.

In the figure, ■ is the VTR image processing device, 2 is the electronic computer (CPU), 3 is the first (DVTR, 4 is the second) V
T.R.

5 is the third VTR, 6 and 7 are the NTSC 7' coders, 8 is the NTSC encoder, 9110 is the time base collector, 11 is the VTR monitor selector switch, 12 is the VTR
It's a monitor. Further, in the VTR image processing device 1o,
100 is an NTSC synchronization signal generator, 101 is the first VT
R image memory 102 is the second VTR image memory 110
3 is an arithmetic memory, 104 is a CPU interface control unit, and 105 and 106 are analog/digital converters (
A/l) converter), 107 is an output multiplexer,
108 is a digital/analog converter (D/A converter). The reference synchronization signal of the NTSC synchronization signal generator 100 is supplied to the first and second VTRs 3 and 4, the time base collectors 9 and 10, and the NTSC encoder 8. The time base collectors 9 and 1o generate a reference synchronization signal (i.e., NTSCN period signal generation signal generator No. 100) in the VTR image processing device 1 for the video signals output from the first VTR 3 and the second VTR 4.
It is used for the purpose of resynchronizing using .

Also, pNTSCx n:y-〆8 is VTR7ji@
It is used to convert R (red), G (green), and B (blue) hue signals output from the processing device 1 into NTSC video signals.

The VTR image processing device 1, the FAL VTR 3, its time base collector 9, the second VTR 4, and its time base collector 1o operate based on the same reference synchronization signal! ! 7. In the VTR write operation for each VTR instructed by the CPU interface control unit 104, the video signal of the first VTR 3 is synchronized and the image memo! j 101, also the second VTR
The video signal of No. 4 is synchronized and sent to the second VTRij.
*It becomes possible to write to the memory 102 respectively. In reality, the CPU 2 controls the VTR for each VTR.
A write command is issued, and the CPU interface control unit 104 executes this command. Therefore, the first V
The video signal of the first VTR 3 written in the TR image memo January 01 is converted into NTSC signals R (red) and G (green) by the NTSC7' coder 6.

The B (back) hue signals are further passed through the A/l) converter 105 and become data that can be written into the first VTR image memory 101. 1st VTR3 (7)
Since the data amount of one frame of video signal is expressed by each RGH hue signal of 8 bits per element, RG
Each B hue has (512x480x8) bits. Therefore, the capacity of the first VTR image memory 101 is R
When GB each hue is combined, (512X480X8X3)
Becomes a bit. Further, the video signal of the second VTR 4 written to the second VTR image memory 102 is similarly NTS
After passing through the C decoder 7 and converter 106, the second VT
This becomes data that can be written into the R image memory 102. The capacity of the second VTR image memo IJ 102 is equal to the capacity of the first VTR image memory 101. in this way,
The video signals of the first VTR 3 and the second VTR 4 are C
VTR write commands corresponding to each VTR issued from PU2.

The video signal of one frame at that time is decomposed into each RGB hue signal, and the first and second VTR image memo!
Written to J l 01 and 102. therefore,
By issuing a VTR write command from the CPU 2 at regular intervals, the first VTR image memory 101 and the second VT
The R image memo 'J102 contains the first
The video signals of the second VTR 3 and the second VTR 4 are written as a one-frame still image.

Next, the data were written to the first VTR image memory 101 and the second VTR image memo 1.1102, respectively.

17-A R of the first VTR 3 and second VTR 4
In each GB hue data. Data for one pixel (8 bits) is stored in the first VTR image memory 101 and the second VTR.
Image memo! Read from 7102.

It is input to the calculation memory 103. The calculation memory 103 is
It receives an arithmetic command issued from the CPU 2 via the CPU interface control unit 104, executes the arithmetic operation, and writes the result of the arithmetic operation again into the designated first or second VTR image memory. By repeating the above operation 512 times for 512 pixels for each scanning line, and then repeating the calculation for 480 effective scanning lines, the VTR image composition is completed.

Arithmetic instructions issued from CPU 2 include unconditional, AN
D.

OR, EX-OR (exclusive OR) L order R, GREAT
E.R.

Needless to say, calculations such as EQUAL are provided.

Here, specific examples of VTR image composition are shown in Figures 2 and 3.
This will be explained with reference to the figures. FIG. 2 shows an example of overlapping composition, and FIG. 3 shows an example of inset composition.

The superimposition shown in FIG. 2 is performed in the first VTR image memory 10.
1 and the data of the second VTR image memory 102 are ORed.

Also, the inset composition in Fig. 3 is the first VTR image memory 1.
01 and the data of the second VTR image memory 102
It can be obtained by combining R operations.

The composite image of the VTR created by performing such calculations is sent to the first VT according to instructions from CPU 2 as described above.
R image memory 101 or second VTR image memory 102
will be written to. These l frames of RGB hue data are stored in the first VTR image memo IJIOI or the second VT
D/A via an output multi f19 chainer 107 that switches which data from the R image memory 102 is output.
p N through converter 108 and NTSC encoder 8
It becomes a TSC video signal. This video signal is immediately transferred to the third V
It will be recorded on TR5. In this case, the third VT
Since R5 is used simply to record the video signal sent from the VTR image processing device-11, the third VT
The synchronization signal for R5 does not need to be supplied from the NTSC synchronization signal generator 100, and the third VTR 5 can operate with its own internal synchronization signal. As a result, the third VTR 5 uses the Video Home System (VH8) method or Beta (
(b) It can be used with any type of VTR.

The above operation will be specifically explained using the editing time chart shown in FIG. The first VTR 3 and the second VTR 4 each have A
, B, C,..., N and a l b l CI...,
n is recorded. ■The frame is an ancient second. Here, if the VTR write command is issued from the CPU 2 every 4 frames corresponding to each VTR, then Figure 4 shows the first VTR image memo I) l 01 and the second VTR image in frame units. 1 is written to memory 10.2. First VTR image memory 101 and second VTR image memo'J
The image created as a result of performing memory operations between 102 and 102 (
If it is expressed as A, a), the third VTR 5 records (A, a) until the next frame is switched. In this way, the CPU interface control unit 104, which receives the VTR write command and the memory operation command from the CPU 2, can control the first VTR 3 and the second VTR 4 (7).
It becomes possible to record the composite image on the third vTR5.

Further, the VTR monitor changeover switch 11 is connected to the first VTR 3.
, the second VTR 4 and the third VTR 5 on the VTR monitor 12.

In the above embodiment, the case where the present invention is applied to the NTSC system as the television system has been described, but it goes without saying that it can also be applied to other television systems (for example, the PAL system, the SBCAM system, etc.).

As is clear from the above explanation, there are two VTRs according to the present invention.
By using the editing control method, the first video
One frame of the moving image from the tape recorder and one frame of the moving image from the second video tape recorder are each extracted as still images, and the still images are combined with each other and recorded on the third video tape recorder. This has the effect of greatly contributing to the improvement of image processing technology for video tape recorder images.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a VTR editing control system according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of composition by superimposing VTR images, and FIG. 3 is a diagram showing an example of composition by overlapping VTR images. A diagram showing a synthesis example. FIG. 4 is an editing time chart of the embodiment shown in FIG. Explanation of symbols: 1 is the VTR image processing device, 2 is the electronic computer, 3 is the first VTR, 4 is the 217th) VTR, 5 is the third
VTR, 6 and 7 are NTSC decoders, 8 is NTSC engineer/coater, 9 + 10 is time base collector. 11 is a VTR monitor changeover switch, 12 is a VTR monitor, 100 is an NTSC synchronization signal generator, and 101 is a first VTR monitor.
TR image memo IJ, 102 is a second VTR image memory, 103 is an arithmetic memory, 04 is a CPU interface control section, 105 and 106 are fitted converters, 107 is an output multiplexer, and 108 is a D/A converter, respectively. .

Claims (1)

[Claims] 1. A video tape recorder editing control method for editing videos on first and second video tape recorders and recording them on a third video tape recorder, the video tape recorder editing control method comprising: a synchronization signal generator that supplies a reference synchronization signal to each of the video tape recorders; a first image memory in which a video signal corresponding to one frame of video of the first video tape recorder is written; Said second
a second image memory into which a video signal corresponding to one frame of video of the video tape recorder is written; an arithmetic memory for synthesizing the respective contents of the first and second image memories; and an electronic computer. 1 of the footage of said first and second video tape records/in accordance with instructions from
A computer interface control unit capable of writing video signals corresponding to frames into the first and second image memories, respectively, and causing the third video tape recorder to record the results synthesized by the arithmetic memory. and the computer interface control unit causes the third video tape recorder to record the synthesized result according to an instruction from the computer. method.