JPS58114513U - Erase head drive circuit - Google Patents
Erase head drive circuitInfo
- Publication number
- JPS58114513U JPS58114513U JP981782U JP981782U JPS58114513U JP S58114513 U JPS58114513 U JP S58114513U JP 981782 U JP981782 U JP 981782U JP 981782 U JP981782 U JP 981782U JP S58114513 U JPS58114513 U JP S58114513U
- Authority
- JP
- Japan
- Prior art keywords
- drive circuit
- erasing head
- head drive
- erase head
- differential amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Magnetic Heads (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
、 第１図は従来の消去ヘッド駆動回路を示す回路
図、第２図は本考案の一実施例を示す回路図であ′
る。
Ｃ・・・コンデンサ、Ｑ工、Ｑ２・・・トランジスタ、
７： ・・・消去ヘッド、８・・・消去ヘッド巻線、
９・・・中間端子、１１・・・バイアス発振器。, Fig. 1 is a circuit diagram showing a conventional erasing head drive circuit, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
Ru. C... Capacitor, Q engineering, Q2... Transistor,
7: ...Erasing head, 8...Erasing head winding,
9... Intermediate terminal, 11... Bias oscillator.
Claims (1)
の両端に２つのトランジスタのそれぞれのコレクタを接
続してなる差動増幅器と、該２つのトランジスタのそれ
ぞれのコしフタ間に消去ヘッド巻線と並列共振回路を構
成するように接続され、その共振周波数がバイアス発振
器の発振周波数とほぼ等しくなるような容量を持つコン
デンサとを備え、前記消去ヘッド巻線の中間端子に電源
を接続し、差動増幅器を構成する前記各トランジスタの
ベースにバイアス発振器の出力を印加する、 ように
構成したことを特徴とする消去ヘッド駆動、 回路。 “[Claims for Utility Model Registration] A differential amplifier comprising an erasing head winding having an intermediate terminal, the collectors of two transistors connected to both ends of the erasing head winding, and A capacitor is connected between the lids to form a parallel resonant circuit with the erasing head winding, and has a capacitance such that the resonance frequency thereof is approximately equal to the oscillation frequency of the bias oscillator. An erasing head drive circuit characterized in that: a power supply is connected to an intermediate terminal, and an output of a bias oscillator is applied to the bases of each of the transistors constituting a differential amplifier. “
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP981782U JPS58114513U (en) | 1982-01-27 | 1982-01-27 | Erase head drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP981782U JPS58114513U (en) | 1982-01-27 | 1982-01-27 | Erase head drive circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58114513U true JPS58114513U (en) | 1983-08-05 |
Family
ID=30022430
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP981782U Pending JPS58114513U (en) | 1982-01-27 | 1982-01-27 | Erase head drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58114513U (en) |
-
1982
- 1982-01-27 JP JP981782U patent/JPS58114513U/en active Pending
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