JPS58114281A - Sending out device of optional area of image data - Google Patents

Abstract

PURPOSE:To send out an optional area of image data stored unidimensionally as continuous bits, by supplying necessary data out of image data set in a source register to a result register. CONSTITUTION:Image data to be sent out are read out in one word unit from a memory 2, and the read out image data are separately written by one word in a source register 51. The image data in the source register 51 are inputted in parallel into a result register 57. At the time of the input of the image data, a shift control register 53 instructs that whether an image data outputted from the source register 53 is to be stored in the result register 57 or not.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image data arbitrary area cutting device for cutting out image data stored in a memory as continuous data.

An image information processing device extracts image data read from a document as two-dimensional data corresponding to a predetermined area of the document, and performs information processing such as enlarging or reducing characters or removing noise based on this data. There are many. For example, suppose that the value of certain data (one dot) is determined in order to remove noise from image data. In this case, if the surrounding 8 dots are referred to, image data of 3×3 dots will be cut out. That is, in this case, a rectangular area with three dots on each side is cut out on the original.

By the way, in image information processing apparatuses, originals are usually read using a rask scanning method. FIG. 1 shows this reading principle. First, one-dimensional image data regarding a first line β1 is read from a document 1. Next, the same one-dimensional image data for the second line 12 is read. The same applies below.

FIG. 2 shows how the image data read in this way is stored in the memory. Image data is stored in the memory 2 in word units such as 8 bits or 16 bits. Image data for each line is composed of a plurality of words. Therefore, the image data of the first line 11 is in the scanning direction (in the direction of the arrow)
The data is stored in the memory 2 in the form of being divided into several stages.

When one page of image data is stored in the memory 2 in this manner, image data is cut out for an arbitrary rectangular area 3 of the document 1 shown in FIG. 3. In the case of this figure, image data is cut out for a predetermined portion of the lines from the N-th line iN (N is an arbitrary integer) to the N+2-th line βN+2. As mentioned above, the image data in memory 2 is
It is not stored as two-dimensional data. That is, the image data corresponding to the rectangular area 3 is stored in the memory 2 in a distributed form as shown by diagonal lines in FIG. Therefore, when cutting out image data, it is necessary to sequentially read out the data in the memory 2 in the sub-scanning direction and recognize necessary data from among them one by one.

The present invention has been made in view of the above-mentioned circumstances, and is a method for cutting out arbitrary areas of image data that can cut out image data stored in a memory as continuous data.
The purpose is to provide a device for

In the present invention, there is provided a source register consisting of a successive means for reading image data to be cut out from a memory word by word, a plurality of shift registers for individually writing image data read by the successive means for each word, and a source register. Shift the image data in the register and input the parallel image data (carry bit) that is output in parallel to the Zalt register and the saw.
The apparatus for cutting out an arbitrary area of image data is provided with a shift control register that specifies for each individual shift register whether or not a carry bit outputted from the plurality of shift registers constituting the plurality of shift registers is to be stored in the result register. With this device, by supplying necessary data from the image data set in the source register to the result register, it is possible to cut out an arbitrary area of image data stored one-dimensionally (bit serially) as continuous bits. It becomes possible.

The present invention will be described in detail with reference to Examples below.

FIG. 5 shows a device for cutting out an arbitrary area of image data. The image data arbitrary area cutting device 5 includes a source register 51 that stores image data read from the memory 2 in units of words. In the diagram of the source register 51, on the left side are the source registers,
A carry register 52 for storing a carry pit from 51 is arranged. When the source register 51 is shifted to the left, the N shift registers R1~
A carry bit output from each RN is stored in a carry register 52. The N pieces of parallel image data 5 output from the carry register 52 are ANDed with the designation signal 6 output from the shift control register 53 by an AND circuit 54. Necessary image data 7 output from the AND circuit 54 is supplied to a shift control circuit 56 via an OR circuit 55, and from there to a result register 57. On the other hand, the designation signal 6 output from the shift control register 53 is also supplied to the inverter 58. The designation signal 8 whose logic state has been inverted by the inverter 58 is supplied to an AND circuit 59, where it is ANDed with the previous continuous signal 9 output from the result register 57. AND circuit 59
The output signal 11 output from the circuit is supplied to the OR circuit 55 described above.

Using this image data arbitrary region extraction device,
Next, a case will be described in which the image data of the portion surrounded by the one-dot chain line in FIG. 6 is cut out.

The region 61 cut out in FIG. 6 is a rectangular region of 4×4 dots. In this case, shift registers of the source register 51 shown in FIG. 5 are required for the total number of bits existing in the area 61.

For shift control register 53 and result register 57, registers capable of accommodating the same number of 16 bits are used.

Now, when the extraction operation is started, four words φW to 3W including a part of the area 61 are selected, transferred through the pass line 13, and supplied to the source register 51. In the source register 51, as shown in FIG.
The third word 3W is stored in the F-th shift register R8, and the third word 3W is stored in the F-th shift register RF. At this time, the previously stored image data Bφ to BF remain in the output register 57 as they are. In addition, the shift control register 53 is set to shift register R at this stage.
1 to R2 are not specified.

In this state, the source register 51 first performs the first shift operation. As a result, each image data φφ, 1φ, 2
φ and 3φ are stored in the source register 5 along with other image data.
1 is output as a carry bit and stored in the carry register 52.

The carry register 52 supplies this to the AND circuit 54 as 16-bit parallel image data 5. The AND circuit 54 performs a logical product with the designation signal 6 output from the shift control register 53 for each register.

All signal contents of the shift control register 53 are at L (low) level in this state. Therefore, the AND circuit 54
All of the image data 7 outputted from the circuit become L level signals. In this state, all contents of the result register 57 are cleared to L level. Therefore, the output signal 11 of the AND circuit 59, which receives the continuous signal 9 that is all at L level and the designation signal 8 whose logic state is inverted from the inverter 58, is also all at L level. OR circuit 5
5 takes the logical sum of these signals 7 and 11 and outputs an L level signal as the logical sum signal 14. Under this signal state, the shift control circuit 56 outputs image data that is all in the L level logic state to the result register 57. As a result, result register 57
In this state, the contents of all become L level signals.

When the next shift operation is performed, image data φ1.11°21.31 is outputted from the source register 51 along with other image data. These image data are also input into the result register 57 as L level signals in the same manner as described above. The same holds true when the source register 51 performs the next shift operation.

FIG. 7B shows a state in which this third shift operation has been performed.

Now, when the source register 51 performs the fourth shift operation, as shown in FIG. 4C, the necessary image data φ3,
13.23.33 is taken into the carry register 52 along with other image data. At the same time, the signal contents of the shift control register 53 change as shown in FIG.

In other words, the shift control register 53 corresponds to the position where the image data φ3.13.23.33 is output.
The signal inside changes to H (high) level (indicated by diagonal lines in the figure). Such signal changes within the shift control register 53 change the range (area) of data to be extracted.
It is set in advance in relation to The AND circuit 54 performs a logical product of the image data 5 and the designation signal 6, and as a result, desired image data φ3.13.23.33 is supplied as the image data 7 to the OR circuit 55.

In this state, only the L level signal is stored in the Rizal register 57. Therefore, the output signal 11 consists entirely of L level signals. The OR circuit 55 receives these signals 7.
11 is taken, and a signal representing the signal contents of image data φ3.13.23°33 as is is outputted as a logical sum signal 14. The shift control circuit 56 inputs these signals 14 to the parallel input terminals of the result register 57, and shifts the result register 57 upward by one bit in the diagram (FIG. 7D).

In this state, the source register 51 performs the fifth shift operation. As a result, the image data φ4゜14.24.3
4 is carried in the carry register 5 along with other image data.
2. This back image data φ4,14
．． 24.34 is the result of ANDing with the designation signal 6 output from the shift control register 53,
The image data 7 is supplied to the OR circuit 55. On the other hand, after the designated signal 6 has its logic state inverted by the inverter 58 (FIG. 8A), the previous continuous signal 9 (FIG. 8B)
A logical AND is performed between them. The output signal 11 thus obtained (FIG. 8C) is ORed with the image data 7. The OR output signal 14 (FIG. 8D) is supplied to the parallel input terminals of the result register 57.

Shift control circuit 56 then shifts result register 57 upward by one bit (FIG. 7E).

After this, the source register 51 performs the sixth shift operation. As a result, the image data φ5゜15.25.35
is stored in the carry register 52 along with other image data.
stored within. Behind this image data φ5, 15,
25.35 is supplied to the OR circuit 55 as image data 7.

On the other hand, after the designated signal 6 has its logic state inverted by the inverter 58 (FIG. 9A), the next consecutive signal 9 (FIG. 9B)
). The thus obtained output signal 11 (FIG. 9C) is ORed with the image data 7. OR output signal 14 (Fig. 9D)
are supplied to the parallel input terminals of the result register 57. The shift control circuit 56 then shifts the result register 57 upward by one bit in the figure (7th
Figure F).

The same holds true when the source register 51 performs the seventh shift operation (FIG. 7G). However, in this case, the shift control circuit 56 supplies a signal to the result register 57 to stop the shift operation, so the most recent image data φ3 is not pushed out from the result register 57.

When this seventh shift operation is completed, the cut out image data is serially arranged in the result register 57. Therefore, if this is output as a parallel 16-bit cutout signal 16, desired image data as shown in FIG. 10 can be obtained. Cutout signal 1
6 may be transferred via the path line 13 to a device (not shown) for information processing, or may be stored in a predetermined area of the memory 2.

In the arbitrary region cutting device for image data in this embodiment, when necessary image data is being output as image data 5, the contents of the shift control register 53 are not changed. Each time the source register 51 performs a shift operation, the shift control register 5
By changing the contents of 3, it becomes possible to cut out, for example, a triangular area 17 as shown in FIG. 11 as continuous image data. However, as explained later,
In this case, care must be taken in selecting the source register 51 in which the image data is set.

Next, in the image data arbitrary region cutting device of this embodiment, the contents of the result register 57 are retained even if the contents of the source register 51 are reset after being shifted several times. As shown in Figure 12,
By sequentially storing data from the memory in the source register 51, it is possible to extract image data spanning two or more words as continuous image data. Furthermore, 16x16 bit image data is stored in the source register 51 (R=-R*>), the shift control register 53 outputs the designation signal 6 of all H, and the image data is stored without performing a shift operation in the result register 57. By storing this and reading it every time the source register 51 shifts, image data rotated 90 degrees to the left can be obtained as the cutout signal 16.

Next, a case will be described in which image data that is divided in memory is converted into image data that is continuous in one direction.

FIG. 13 shows the data structure before conversion. Image data is arranged in a line of 4 bits each. In this case as well, a register capable of accommodating 16 bits is used as the shift register constituting the source register 51.

When the extraction operation starts, the word φW~ to be transformed is
3φ is selected, transferred through the pass line 13 and supplied to the source register 51. In the source register 51, the first
4. As shown in FIG. Words 3W of 3W are respectively stored in the F-th register R1.

At this time, the shift control register, star 53, has signals corresponding to shift registers R3, R7, Re, and RF high.
level, and the others are at L level.

When the source register 51 repeats the shift operation three times in this state, the image data is stored in the result register 57 each time (Fig. 14 B-D). The circuit operation for this is explained in Fig. 7. is the same as
The explanation will be omitted. When the source register 51 performs the fourth shift operation, one word of image data is stored in the result register 57 in a continuous form as shown in FIG. 14E. At this time, the shift control circuit 56 does not shift the output register 57.

When one word of image data is written in the result register 57, if it is read out as the cutout signal 16, the Oth word φW' is obtained as shown in FIG. Following this, if the above operation is repeated three times, the 15th
From the first word 1W- to the third word 3 as shown in the figure
Data up to W- are obtained in the same manner, and the conversion to continuous image data is completed. It does not require any particular explanation that inverse transformation is also possible using the image data arbitrary region cutting device shown in FIG. 4 Next, the general principle regarding which shift register of the source register 51 stores a word when cutting out image data will be explained. Suppose now that a pentagonal region 18 shown in FIG. 16 is cut out.

In FIG. 17, consecutive numbers are assigned to the image data to be cut out for convenience. The following will explain using these numbers. Since there is a total of 16 bits of image data in the area 18, the source register 51 (FIG. 5)
16 shift registers are required.

Now, when the extraction operation is started, four words φW to 4W including part of the area 18 are selected and stored in the source register 51. , then the 0th word ψW
The shift register to store is determined as follows. That is, the maximum bit length between the O-th image data "φ" and the other words 1W to 4W is determined. In this case, there are two hits, so two shift registers are skipped and the Oth word OW is stored in the second shift register R2 (FIG. 18).

The other words 1W to 4W will be explained based on FIG. 19. FIG. 19 shows how each word is stored in the source register 51. source register 5
1, the Oth image j.

2.6.A and D image data ゛/゛', 6°'
, "A 11 and D 11 are output. Therefore, the first
The board 1W is accommodated in shift registers sandwiched between the minimum number of shift registers necessary to accommodate the image reader 1' in the result register 57 at this stage. In this case, there is only one shift register in between, so
The first load 1W is accommodated in the fourth shift register R4. Next, for the second word 2W, the third image data "3", the fourth image data "4" and the
15 I+ is image data “2” and image data “
6'', the second word 2W is stored in the eighth shift register R8. Similarly, the third word 3W' is stored in the C-th shift register Rc.
Also, the fourth board 4W is the F-th shift register RF.
be accommodated in.

When the five words φW to 5W are stored in the source register 51, a mask operation is performed using the carry register 52 so that only necessary image data is supplied to the OR circuit 55. In this case, the signal contents of the shift control register 53 will differ each time the source register 51 performs a shift operation. Other circuit operations have already been explained in detail, so they will be omitted.

As described above, according to the present invention, the image data stored in the memory can be output as continuous image data, so the image data processing circuit becomes simple. Furthermore, since it is possible to cut out image data with a complex shape, it has the advantage that it can be used for various image processing.

In the embodiment, the words of the area to be cut out are input as they are to the source register 51, but only the necessary image data strings may be input with their ends (left end in the figure) aligned. Of course. Furthermore, although the method for detecting the point in time when all the necessary image data has been stored in the register register 57 has not been described in the embodiment, for example, if a carry bit is stored in the register register 57 in advance, and when this is output, Techniques exist for detecting the point in time. According to this method, there is no need to manage the number of shifts of the source register 51 using a shift counter.

[Brief explanation of the drawing]

Figure 1 is a plan view for explaining how to read a document using the Rusk scanning method, Figure 2 is an explanatory diagram showing how image data read by the Rusk scanning method is stored in memory, and Figure 3 is a plan view of the original. FIG. 4 is an explanatory diagram showing a state in which the same portion is cut out in memory; FIGS. 5 to 19 are for explaining one embodiment of the present invention; The figure is a block diagram of a device for cutting out arbitrary areas of image data, Figure 6 is an explanatory diagram showing the state of pixels on a document when cutting into a rectangular shape, and Figure 7 is when cutting out the image data shown in Figure 6. Figure A shows the state of the signals in the source register, etc., and Figure A is an explanatory diagram showing the state in which the desired word is stored in the source register, and Figure 8 shows the state after the source register has performed the shift operation three times. Figure C is an explanatory diagram showing the state after the fourth shift operation, and this figure is an explanatory diagram showing the state in which the result register is shifted once in this state.
Figure E is an explanatory diagram showing the state after the fifth shift operation, Figure F is an explanatory diagram showing the state after the sixth shift operation, and Figure G is an explanatory diagram showing the state after the seventh shift operation. 8A to 8D are explanatory diagrams showing the processing process of the signal supplied to the result register in the 5th shift operation, and FIG. 9 is the result in the 6th shift operation. An explanatory diagram showing the processing process of the signal supplied to the register, Fig. 10 is an explanatory diagram showing the state in which the rectangular area image data shown in Fig. 6 is converted into continuous image data, and Fig. 11 is a triangular image data. FIG. 12 is an explanatory diagram showing the state of pixels on a document when cutting out in the shape of .
FIG. 13 is an explanatory diagram showing the state of image data divided in memory, and FIG. 14 is a signal state of source registers, etc. in the procedure for converting the image data shown in FIG. 13 into continuous image data. Figure A is an explanatory diagram showing the state in which the desired word is stored in the source register, Figure 8 is an explanatory diagram showing the state after the first shift operation, and Figure C is an explanatory diagram showing the state after the first shift operation. An explanatory diagram showing the state after performing the first shift operation, the same figure is an explanatory diagram showing the state after performing the third shift operation, and E in the same figure is an explanatory diagram showing the state after performing the third shift operation.
Explanatory diagram showing the state after the first shift operation, 1st
Figure 5 is an explanatory diagram showing the state of conversion into continuous image data, Figure 16 is an explanatory diagram showing the state of pixels on the document when cutting out into a pentagonal shape, and Figure 17 is an explanatory diagram showing the state of pixels on the document when cutting out into a pentagonal shape. Figure 18 is an explanatory diagram showing the state in which each word is stored in the source register, and Figure 19 is an explanatory diagram showing the image data to be extracted and the source register that stores these image data. FIG. 2 is an explanatory diagram showing the relationship between the shift register and the shift register. 2... Memory 17... Triangular area 18... Pentagonal area 51... Source register 53... Shift control register 56...
...Shift control circuit 57 ...Result register 61 ...Area application Person Fuji Xerox Co., Ltd. Representative Patent attorney Umeo Yamauchi (G) Haya tl Figure 0 60 q○ @A○ ■ B○ C○ @D○ 19 Figure 7 “6′q″ ■ ■■ ■■■ ■■■ @■O

Claims (1)

[Claims] Consisting of a readout means for reading out word-by-word image data containing image data existing in an area on the document to be cut out from memory, and a plurality of shift registers for individually inputting the read-out image data in word-by-word units. a source register; a register for selectively accommodating carry bits output from the shift register in parallel by a shift operation of the source register;
A control means for controlling the carry bit selection operation of the result register and the shift operation after carrying the carry bit is stored, and stores only the image data existing in the area sequentially in parallel in the result register to create continuous data. A device for cutting out an arbitrary region of image data.