JPH05119764A - Method for plotting design data of circuit - Google Patents

Method for plotting design data of circuit

Info

Publication number
JPH05119764A
JPH05119764A JP3281409A JP28140991A JPH05119764A JP H05119764 A JPH05119764 A JP H05119764A JP 3281409 A JP3281409 A JP 3281409A JP 28140991 A JP28140991 A JP 28140991A JP H05119764 A JPH05119764 A JP H05119764A
Authority
JP
Japan
Prior art keywords
data
plotting
program
expression
bit map
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3281409A
Other languages
Japanese (ja)
Inventor
Toshiaki Yanagihara
俊明 柳原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3281409A priority Critical patent/JPH05119764A/en
Publication of JPH05119764A publication Critical patent/JPH05119764A/en
Pending legal-status Critical Current

Links

Landscapes

  • Controls And Circuits For Display Device (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Image Generation (AREA)

Abstract

PURPOSE:To plot the design data of an integrated circuit on a display device at high speed by preparing data previously expressed in terms of bit map and plotting it. CONSTITUTION:The display device is constituted of a secondary storage means 11 which stores plotting object data, a primary storage means 12 which temporarily stores the plotting object data by apex column expression 13 and a bit map expression 14 which are a data storing method on the means 11 at the time of plotting processing, an arithmetic means 15 consisting of a plotting requirement program 16 and a plotting program 17, and a display means 18. In this plotting method, the bit map expression data is directly required to be plotted instead of apex expression data, so that plotting speed is increased. For example, in the conventional system, 100Mbyte of data transfer and bit map conversion are needed in order to plot the input data of 100Mbyte. In this system, only at most 1Mbyte of transfer will do, and the speed 100 or more times as high as the conventional one is obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は回路設計データの描画方
法に関し、特に頂点列表現描画及びビットマップ表現描
画を切り替えながら描画する高速描画方法に関する物で
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for drawing circuit design data, and more particularly to a high-speed drawing method for performing drawing while switching between vertex sequence expression drawing and bitmap expression drawing.

【0002】[0002]

【従来の技術】従来の回路設計データの描画方法を用い
たシステムとしては、描画対象となる集積回路の設計デ
ータ全体と拡大表示された一部分を交互にディスプレイ
上に描画することにより目視希望箇所を表示するものが
考えられる。この時、集積回路の設計データ全体等は複
数回再描画されることになる。
2. Description of the Related Art As a system using a conventional circuit design data drawing method, the whole design data of an integrated circuit to be drawn and a magnified part are alternately drawn on a display to find a desired visual point. You can think of something to display. At this time, the entire design data of the integrated circuit is redrawn multiple times.

【0003】例えば図3に示すように二次記憶手段、頂
点表現の形でデータ格納する一次記憶手段,演算手段,
描画要求プログラム,描画プログラム及びディスプレイ
手段を有し、その動作は描画要求プログラムによって二
次記憶手段より入力されたデータを頂点列表現のまま一
次記憶手段で一時記憶して、一次記憶手段上のデータを
そのまま描画プログラムに転送して描画するように構成
されている。頂点列表現とは各描画データを多角形と考
えその頂点列の集まりでデータ表現することである。こ
こで、特に描画要求プログラム及び描画プログラムは図
4のような手段で比較処理をおこなうものであった。す
なわち、描画要求プログラムは二次記憶上に描画データ
が残っている限りデータを頂点表現のまま一次記憶上に
入力しそれを描画プログラムへ渡し、描画プログラムは
受け取ったデータをそれぞれビットマップ化してディス
プレイに出力するようになっていた。
For example, as shown in FIG. 3, a secondary storage means, a primary storage means for storing data in the form of a vertex expression, a computing means,
It has a drawing request program, a drawing program and a display means, and its operation is to temporarily store in the primary storage means the data input from the secondary storage means by the drawing request program in the form of a vertex sequence, and to store the data on the primary storage means. Is transferred to the drawing program as it is and drawn. The vertex sequence representation means that each drawing data is considered as a polygon and is represented by a collection of the vertex sequences. Here, in particular, the drawing request program and the drawing program perform the comparison process by the means as shown in FIG. That is, the drawing request program inputs the data in the primary storage as the vertex representation and passes it to the drawing program as long as the drawing data remains in the secondary storage, and the drawing program converts each received data into a bitmap and displays it. It was supposed to output to.

【0004】[0004]

【発明が解決しようとする課題】しかし何度も同じ描画
要求の出される傾向のあるこの種のシステムにおいて、
上に述べた従来の回路設計データの描画方法では、描画
要求が発行される度に、結果的にディスプレイ上で人間
が目で確認することのできるビット以下の細かいデータ
までを含むすべてのデータを、描画要求プログラムより
描画プログラムへ転送し描画プログラムにおいてビット
マップ化する必要があり、更にそれらをディスプレイへ
出力する必要があった。これは、同じ描画データに対す
る描画要求プログラムより描画プログラムへの転送及び
描画プログラムにおけるビットマップ化の頻度をいちじ
るしく上昇させ、処理時間を著しく増大させる欠点があ
った。すなわち、従来の描画処理では、描画要求プログ
ラム側でのデータの格納方法が頂点表現に限られていた
という理由により、上記の処理は必須のものと考えら
れ、別の手段への代替は非常に困難であった。従って、
上述した処理規模として二次記憶上で100Mバイトの
大きさのデータを描画しようとするとそのまま描画の度
に100Mバイト分の転送及び変換処理が必要であり処
理時間の著しい増大を招いていた。
However, in a system of this kind, which tends to be repeatedly given the same drawing request,
In the conventional circuit design data drawing method described above, every time a drawing request is issued, all the data including the sub-bit fine data that can be visually confirmed on the display by the human eye is eventually obtained. , It was necessary to transfer from the drawing request program to the drawing program, to make a bitmap in the drawing program, and to output them to the display. This has a drawback in that the frequency of transfer to the drawing program from the drawing request program for the same drawing data and the bitmap conversion in the drawing program is significantly increased, and the processing time is significantly increased. That is, in the conventional drawing processing, the above-mentioned processing is considered to be indispensable because the data storage method on the drawing requesting program side is limited to the vertex representation, and replacement with another means is very important. It was difficult. Therefore,
When it is attempted to draw data having a size of 100 Mbytes on the secondary storage as the above-mentioned processing scale, 100 Mbytes of transfer and conversion processing are required each time drawing is performed, resulting in a significant increase in processing time.

【0005】[0005]

【課題を解決するための手段】本発明の回路設計データ
の描画方法は、描画対象データを格納する二次記憶手段
と、描画処理時に描画対象データを前出二次記憶手段上
のデータ格納方法である頂点列表現及びビットマップ表
現で一時記憶する一次記憶手段と、描画要求及び描画演
算を行う演算手段と、ディスプレイ手段とを有すること
を特徴とする。
A circuit design data drawing method according to the present invention comprises a secondary storage means for storing drawing target data and a method for storing the drawing target data in the secondary storage means at the time of drawing processing. The primary storage means for temporarily storing the vertex array representation and the bitmap representation, the computing means for performing the rendering request and the rendering computation, and the display means.

【0006】[0006]

【実施例】次に本発明について図面を参照して詳細に説
明する。
The present invention will be described in detail with reference to the drawings.

【0007】図1に示されるように本発明の一実施例
は、描画対象データを格納する二次記憶手段と、描画処
理時に描画対象データを前出二次記憶手段上のデータ格
納方法である頂点列表現及びビットマップ表現で一時記
憶する一次記憶手段と、描画要求プログラム及び描画プ
ログラムで構成される演算手段と、ディスプレイ手段か
ら構成される。
As shown in FIG. 1, one embodiment of the present invention is a secondary storage means for storing drawing target data and a method for storing the drawing target data in the secondary storage means at the time of drawing processing. It is composed of a primary storage means for temporarily storing the vertex string representation and the bitmap representation, a computing means composed of a drawing request program and a drawing program, and a display means.

【0008】次に描画要求プログラム及び描画プログラ
ムについて図2を用いて説明する。
Next, the drawing request program and the drawing program will be described with reference to FIG.

【0009】図2において、描画要求プログラムは、二
次記憶上に描画データが残っている限りデータを頂点表
現及びビットマップ表現に変換して一次記憶上に入力し
た後、描画データ数がある一定の値以下であれば従来ど
うり頂点表現データを描画プログラムに転送し、描画デ
ータ数が前出値以上であればビットマップ表現データを
描画プログラムに転送する。さらに図2において、描画
プログラムは、描画要求のあったデータに対してそれが
頂点表現データであれば従来どうりそのデータをビット
マップ化した後ディスプレイへ出力し、ビットマップ表
現データであればそのままディスプレイへ出力する。
In FIG. 2, the drawing request program converts the data into vertex representations and bitmap representations and inputs them into the primary storage as long as the drawing data remains in the secondary storage, and then the drawing data number is constant. If the value is less than or equal to, the vertex expression data is transferred to the drawing program as in the conventional case, and if the number of drawing data is greater than or equal to the above value, the bitmap expression data is transferred to the drawing program. Further, in FIG. 2, the drawing program, if the drawing request data is the vertex expression data, bit-maps the data as in the conventional case and then outputs it to the display. Output to the display.

【0010】例えば集積回路の設計データ特にレイアウ
トデータに関して本方式を適用すると、図1において、
まず二次記憶上にレイアウトデータが格納されており、
次にそれを描画要求プログラムは頂点列表現及びレイア
ウトデータ全体エリアすなわちチップサイズ分の大きさ
のビットマッププレーン上のビットマップ表現に変換し
つつ一時記憶上に格納する。さらにそれらのデータを描
画プログラムに転送する。ここでチップ全体及びそれに
準じる様な大きなエリアの描画時にはビットマップ表現
データを転送し高速描画を行い、それ以外の時には頂点
列表現データを転送し詳細描画を行う。
When this method is applied to, for example, design data of an integrated circuit, particularly layout data, in FIG.
First, the layout data is stored in the secondary storage,
Next, the drawing request program stores it in the temporary storage while converting it into the vertex array representation and the layout data entire area, that is, the bitmap representation on the bitmap plane of the size of the chip size. Further, those data are transferred to the drawing program. At the time of drawing the entire chip or a large area corresponding to it, bitmap expression data is transferred and high-speed drawing is performed. In other cases, vertex array expression data is transferred and detailed drawing is performed.

【0011】さらに、集積回路の設計データ特に回路図
データに関しても本方式を適用する事ができる。
Further, the present method can be applied to design data of integrated circuits, particularly circuit diagram data.

【0012】[0012]

【発明の効果】本発明の回路設計データの描画方法によ
れば、頂点表現データの代わりにビットマップ表現デー
タを直接描画要求することにより描画スピードを上げる
ことが可能となる。例えば従来方式で100Mバイトの
入力データを描画するには約100Mバイトのデータの
転送及びビットマップ変換が必要であったが、本方式で
あれば高々ディスプレイのビットマップデータ量すなわ
ち高々1Mバイトの転送のみで済むことになり100倍
以上の高速化が可能となる。
According to the circuit design data drawing method of the present invention, the drawing speed can be increased by directly drawing the bitmap expression data instead of the vertex expression data. For example, in order to draw 100 Mbytes of input data in the conventional method, it was necessary to transfer about 100 Mbytes of data and bitmap conversion. With this method, however, the bitmap data amount of the display, that is, 1 Mbytes at most is transferred. Only this is required, and 100 times or more speedup is possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の全体構成図である。FIG. 1 is an overall configuration diagram of an embodiment of the present invention.

【図2】本発明の一実施例の処理フロー図である。FIG. 2 is a processing flow chart of an embodiment of the present invention.

【図3】従来の全体構成図である。FIG. 3 is a conventional overall configuration diagram.

【図4】従来の処理フロー図である。FIG. 4 is a conventional processing flow chart.

【符号の説明】[Explanation of symbols]

11 二次記憶手段 12 一次記憶手段 13 頂点表現データ 14 ビットマップ表現データ 15 演算手段 16 描画要求プログラム 17 描画プログラム 18 ディスプレイ手段 21 描画要求プログラム 22 開始 23 二次記憶読込手段 24 頂点表現データ作成手段 25 ビットマップデータ作成手段 26 データ終了判定手段 27 描画データ数判定手段 28 頂点表現データ描画要求手段 29 ビットマップデータ描画要求手段 210 終了 211 描画プログラム 212 描画要求受付手段 213 描画データ種類判定手段 214 ビットマップ化手段 215 ディスプレイ描画要求手段 31 二次記憶手段 32 一次記憶手段 33 頂点表現データ 34 演算手段 35 描画要求プログラム 36 描画プログラム 37 ディスプレイ手段 41 描画要求プログラム 42 開始 43 二次記憶読込手段 44 頂点表現データ作成手段 45 データ終了判定手段 46 頂点表現データ描画要求手段 47 終了 48 描画プログラム 49 描画要求受付手段 410 ビットマップ化手段 411 ディスプレイ描画要求手段 11 Secondary Storage Means 12 Primary Storage Means 13 Vertex Representation Data 14 Bitmap Representation Data 15 Computing Means 16 Drawing Request Program 17 Drawing Program 18 Display Means 21 Drawing Request Program 22 Start 23 Secondary Storage Reading Means 24 Vertex Expression Data Creating Means 25 Bitmap data creation means 26 Data end determination means 27 Drawing data number determination means 28 Vertex expression data drawing request means 29 Bitmap data drawing request means 210 End 211 Drawing program 212 Drawing request acceptance means 213 Drawing data type judgment means 214 Bitmap conversion Means 215 Display drawing request means 31 Secondary storage means 32 Primary storage means 33 Vertex expression data 34 Computing means 35 Drawing request program 36 Drawing program 37 Display means 41 Drawing Image request program 42 Start 43 Secondary storage reading means 44 Vertex expression data creation means 45 Data end determination means 46 Vertex expression data drawing request means 47 End 48 Drawing program 49 Drawing request acceptance means 410 Bit map forming means 411 Display drawing request means

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 G09G 5/20 8121−5G H01L 21/82 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location G09G 5/20 8121-5G H01L 21/82

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 描画対象データを格納する二次記憶手段
と、描画処理時に描画対象データを前出二次記憶手段上
のデータ格納方法である頂点列表現及びビットマップ表
現で一時記憶する一次記憶手段と、描画要求及び描画演
算を行う演算手段と、ディスプレイ手段を有することを
特徴とする回路設計データの描画方法。
1. A secondary storage means for storing drawing target data, and a primary storage for temporarily storing the drawing target data in a vertex processing expression and a bitmap expression which are data storage methods on the secondary storage means at the time of drawing processing. A drawing method of circuit design data, comprising: a means, an operation means for making a drawing request and a drawing operation, and a display means.
JP3281409A 1991-10-28 1991-10-28 Method for plotting design data of circuit Pending JPH05119764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3281409A JPH05119764A (en) 1991-10-28 1991-10-28 Method for plotting design data of circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3281409A JPH05119764A (en) 1991-10-28 1991-10-28 Method for plotting design data of circuit

Publications (1)

Publication Number Publication Date
JPH05119764A true JPH05119764A (en) 1993-05-18

Family

ID=17638754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3281409A Pending JPH05119764A (en) 1991-10-28 1991-10-28 Method for plotting design data of circuit

Country Status (1)

Country Link
JP (1) JPH05119764A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013149013A (en) * 2012-01-18 2013-08-01 Toshiba Corp Automatic preparation method of circuit diagram

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013149013A (en) * 2012-01-18 2013-08-01 Toshiba Corp Automatic preparation method of circuit diagram

Similar Documents

Publication Publication Date Title
US6232987B1 (en) Progressively renderable outline font and methods of generating, transmitting and rendering the same
US5020002A (en) Method and apparatus for decomposing a quadrilateral figure for display and manipulation by a computer system
US5068803A (en) Method and apparatus for filling contours in digital typefaces
JPH05119764A (en) Method for plotting design data of circuit
US4945497A (en) Method and apparatus for translating rectilinear information into scan line information for display by a computer system
JPH06266339A (en) Character output device
EP0404397A2 (en) Image processing system
JPH04188192A (en) Method and device for producing multigradation character
JPS61221968A (en) Drawing reader
JPH09230784A (en) Map display system
JPS6045287A (en) Clipping processor
JP2605609B2 (en) Dot display processing device
JPS60221873A (en) Thinning processing system of binary picture
JPH01134682A (en) Line folding processing system
JP2852050B2 (en) Image processing device
JP3089740B2 (en) Line drawing device
JP2001005440A (en) Character data generating device
JPH0311471A (en) Plotting processor for character and graphic or the like
JPS63195696A (en) Fast lithography
JP2000222569A (en) Plotter
JPH06231240A (en) Method for approximating outline
JPS60201475A (en) Graphic data processing unit
JPS60194488A (en) Picking processing circuit for crt display
Pickover CHAOS GAME VISUALIZATION OF SEQUENCES
JPH03103990A (en) Multicolor vector generating device

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20010206