JPS58111974A - Memory address control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of the invention mgt The input car image data ta is divided into multiple ridged copying small cells.
7a and m
-The cell memory corresponding to the address is stored in the memory address system of the display device. By using memory for J1i, p1 Buntei main oi
In addition to w*, you can freely display and output the information @t that holds Gutsfic redemption rights, etc.

However, with conventional printers, etc., memos and notes are created in one-to-one correspondence with each completed meal, but
In order to store c1 & field, the storage direction and position of the -direction memory must be 4.
In order to add s, it is possible to write the second O1'w information in the IIt output sacrificial O blank area. ! You have to use it.

(3) Purpose of the Invention The purpose of the present invention is to provide a memory address control method that can reduce the capacity of l1i-memory corresponding to the display direction and can be used everywhere without a TLC platform. Deaaa.

(4) Source @O configuration The memory address control method of this invention is a cell buffer that divides one surface into a large number of scanning small cells and serially stores input image data in units of cells. and a cell memory for storing intra-cell data corresponding to the li face address. : 4IIA means to differentiate, and when there are 1 unspecified cells dead, 1 ml of data is WIItI
It is equipped with a means for skipping to the next O address without liL, so that the output of the cell buffer is not fixed (when the IIIM image data in the cell is
The data is written into the cell memory only when the data is to be stored, and the fixed data in the cell memory is commonly used at certain times. ,,.

(~From@e) 111111 Examples Honduken has taken a different approach to address the shortcomings previously described in OWI.

That is, the display screen is divided into small cells in a matrix, and I! The size and shape of the cell may be, for example, a 16 bit x 16 bit square. ζO The contents of each cell are stored in an arbitrary location in a one-sided memory cell by cell, but only one blank cell is required. Then, in the blank cell k for the address for the Rasu waterfall survey.
Since this address is used at the time of outputting l&, it is difficult to significantly reduce the amount of -plane memory ogt'isn.

The present invention utilizes this raw salt and applies it to a nine-image display @Wit.

FIG. 1 is a schematic explanatory diagram of one example of the present invention.

As mentioned above, if C and VA are divided into multiple cells and a one-to-one one-sided memory (cell memory) is used for them, it will be the same as normal pit scanning, or the BS performance will not be improved. .

As shown in P41iii, one side of the display WA4 is divided into a large number of O-ridge small cells, scanning is performed in cell units, and pit scanning within the cell is performed at the O position. This one
A cell memory 2 corresponding to the ililIN address is provided, and a cell buffer 1 is provided at the front stage of the cell memory 20 for rounding to ensure proper consistency in transfers of input-1 data, 1 display, etc. The cell buffer 1 supports 1Iiii image address scanning, and is serially stored in cell units as shown in the figure. Cell 1.2 has #image data in the cell of 9, for example 16
It is represented by pit x 16 bits. This is not necessarily limited to characters, but may also be a part of a graphic that is separated. Those corresponding to a white background are indicated by all "0's".

The contents of this cell are stored in the cell buffer address, and are stored in the data location of cell 1.2 when the background is not white, and all 10'' in the case of the white background are not written (
All "o'o" data in a certain area is used for the a-output.By doing this, the cell memory IJO capacity is such that the cell data of one cell, which is included at a high rate on one side, is one
Since the cell can be used as a representative, the amount of yam can be reduced at 0w.

To start the cell memory 2, use the cell memory address code 5 to write addresses 1, 2, . . . with the same address as the p cell buffer address. The all 10'' address sends the video signal to display 11!4.

Figures 1 and 2 provide a detailed explanation of the production of the main parts of Figure 1.

In the same figure, for example, IIm in cell buffer 1 is stored in cell buffer 1.
The iron data is cell 1.2, 32 bits, tbl, all''
O'' is composed of the same 32-bit @0'm. This is transferred to the cell memory 2 (using the cell buffer address),
Four pieces of data in cells 1 and 2 are stored in each /* address.

If all @o'' is on, only the cell address will be counted and the cell data will be skipped.

Figure 5 is a collection of fruit sins of the present invention d-1 Deruru PiJ
II! In the JJC, an input signal is input to the cell buffer address color/door block determination circuit 11, and the cell address is stored in the all @0'' flag memory 12. 1
0" or t- is detected, and if the cell is 72 digits @ o" t, that is, the cell is not white, the upper color register 13 is counted up by the buffer address, and the 62 bits of data in the cell are counted up by the lower counter 14. and stores it in cell buffer 1. On the other hand, in the case of a cell with a white background, only the upper counter 1s is counted up, and the lower counter 14 is skipped. By simply storing the planned data in the cell memory 20 at a predetermined address via the data bus 16, all 10' data cannot be stored.

When g is output, the cell memory address code is black, the cell buffer address is set to t, the 7 address is set to the specified address data, the all@0'' address is set to the common address data (all 0), and displayed as a video note.1i14t-display As explained above, according to the present invention, it is possible to determine whether the input image data cell is a white background or not, by setting it in the previous stage of the t-lume 7. : When the background is white, the image data is skipped to the blank address without the mirror plate. This saves the time and effort of transferring all @0"O data, and also saves cell memo data. When the VO capacity is mixed with the white background, the decrease in the volume increases.

In the embodiment, only cells with a white background are targeted, and it is also possible to target cells with 9% ring O time, 9, for example, black aP#Ig, color tone, etc.

[Brief explanation of the drawing]

Fig. 1 is a schematic explanatory diagram of an embodiment of the present invention, Fig. 2 is an explanatory diagram of the production of the mounting part of the embodiment of Fig.
In this diagram, PLL is the cell buffer, 2 is the cell memory, 3 is the cell memory address code, 4 is the display, 11 is the seven-point address count circuit, and 12 is all 10". Book memory, 13 is the upper counter, 14 is the lower counter, 15 is the register, and 16 is the data bus.

Claims (1)

[Claims] In the JL9 image display system, there is provided a cell buffer for serially storing image data in units of seven cells, and a cell memory for storing image data in a cell corresponding to one address. A means to determine whether the data cell is specific or not, and a means to jump to the next O address without loading the cell-image data t-gun when 6 discrimination 0IIF fruit *0 cells are dead. Eh, the cell packa output is not specific, and only when there is internal data in the cell, it is written to the seventh memory, so that the O1*I constant data in the internal memory for a specific field is commonly used. memory address control method.