JPS5810934A - Low-pass filter for pll synthesizer tuner - Google Patents

Abstract

PURPOSE:To optimize the filter characteristic over the entire reception frequency range of a tuner and to improve the S/N ratio of the tuner, by selecting a constant of an LPF corresponding to the change in a VCO sensitivity constant due to the amplitude of tuning voltage. CONSTITUTION:A synthesizer tuner consists of a PLL comprising a VCO36 applying a local oscillation signal to a mixer 34, a prescaler 38 frequency-dividing the frequency of the VCO36 inputted through a buffer 37 to a prescribed number, a control circuit 39 including a comparator comparing the phase ratio between an output signal of the prescaler 38 and the reference frequency signal from the reference oscillator and an LPF40. An output side of the LPF40 of the PLL is provided with a constant switching circuit 41, where the tuning voltage of the LPF40 is detected and the constant of the LPF40 is switched at the circuit 41 according to the amplitude of the detected voltage. The output of the LPF40 is applied to the VCO36 to change the oscillating frequency and the capacitance of varactor diodes 31a and 33a of an antenna tuning circuit 31 and a high frequency tuning circuit 33 is changed, allowing to select the reception frequency and to improve the S/N ratio.

Description

[Detailed Description of the Invention] The present invention is based on PLL (Phase Locked L
oop) The present invention relates to a low-pass filter for a synthesizer tuner, and more specifically, relates to improving the characteristics of a low-pass filter that integrates and smoothes the output voltage of a phase comparator used in a PLL synthesizer tuner.

Generally, a PLL has a phase comparator 1 as shown in FIG.
1. Consisting of a low-pass filter 12 and a voltage-controlled oscillator 13, the phase comparator 11 calculates the phase difference between the externally input reference comparison frequency signal fi (θ) and the output signal fo (θ0) of the voltage-controlled oscillator 13. , including phase lead and lag, integrate and smooth the output of the phase comparator 11 with a low-pass filter 12 and convert it into a DC voltage, and control the oscillation frequency of the voltage-controlled oscillator 13 with the DC voltage. This constitutes an automatic frequency control and automatic phase control loop that tracks the output signal fo (θ0) of the voltage controlled oscillator 13 to the frequency of the reference comparison frequency signal fi (θ), including the phase. As described above, the low-pass filter 12 integrates and smoothes the output of the phase comparator 11, and also removes harmonic components and external noise contained in the output. 12 is S
/N ratio is a major factor determining the ratio.

By the way, as low-pass filters used in PLL synthesizer tuners that apply PLL, conventionally,
As shown in FIG. 2, a filter 22 (lag lead filter) using a CMOS inverter 21 is known.

The filter 22 is composed of a resistor □, R2, and a capacitor C that determine the filter characteristics of the inverter 21 and the filter 22, and the resistance values of these resistors R and R are □,
As is well known, R2 and the capacitance C of the capacitor 2 C are expressed by the following first and second equations.

R, = (KdKo)/(ω2CN) −+11R2
-(2ζ)/(ωr, C) -(21 However, in the first and second equations above, Kd is the gain of the phase comparator 11 and is expressed by the following third equation.

Kd = ((High level of phase comparator W11) - (Low level of phase comparator 11))/2π (3) Also, KO is the sensitivity constant of voltage controlled oscillator 13, and KO = 2
π×Δf/Δ■, N is the division ratio of the output of the voltage controlled oscillator 13, and ζ is the damping constant [generally selected to be 0.707. ], ωn is the natural angular frequency.

According to the first and second equations above, the filter 22 in FIG.
In the PLL loop of the PLL synthesizer tuner, the sensitivity constant Ko of the voltage controlled oscillator 13 is determined as follows. As can be seen from the above, due to the characteristics of the tuning variable capacitance diode mentioned above, it varies depending on the magnitude of the tuning voltage.

In other words, the curve in Figure 3! Three different points on the top P□, P2
and P3, the ratio of the reception frequency variation Δf to the tuning voltage variation Δ■ is different, and the sensitivity constant KO=2π×Δf/ΔV of the voltage controlled oscillator 13 is different.

However, in the conventional PLL synthesizer tuner, the sensitivity constant Ko is conveniently set at the point P□ of the curve j in FIG.
The value at point P2 between point P3 and point P3 is used9, and from this value, the resistance value - and capacitance C of the filter 22 are determined by the first and second equations, so the curve l
Around the tuning voltage corresponding to point P
There was a problem that the relationship between the N ratio and the scan time was not satisfactory.

The present invention has been made in view of the above-mentioned circumstances regarding a PLL synthesizer tuner, and in a conventional PLL synthesizer tuner, a constant switching circuit is provided to switch the constant of a low-pass filter in accordance with the magnitude of the tuning voltage. By selecting the constant of the low-pass filter in accordance with the change in the sensitivity constant of the voltage-controlled oscillator depending on the size, the filter characteristics of the low-pass filter can be switched according to the sensitivity constant of the voltage-controlled oscillator, and the reception frequency can be controlled over the entire range of 0. It is an object of the present invention to provide a low-pass filter for a PLL synthesizer tuner in which the filter characteristics of the pass filter are optimized and the relationship between the S/N ratio and scan time is improved.

Hereinafter, the present invention will be specifically described with reference to the accompanying drawings.

FIG. 4 shows a block diagram of the main parts of the PLL synthesizer tuner.

In FIG. 4, 30 is an antenna, 31 is an antenna tuning circuit, 32 is a high frequency amplifier, 33 is a high frequency tuning circuit, 3
4 is a mixer (frequency mixer) that converts the signal amplified by the high frequency amplifier 32 into an intermediate frequency signal; 35 is an intermediate frequency amplifier;
The signal system leading to this has basically the same configuration as a normal superheterodyne tuner.

Further, 36 is a voltage controlled oscillator constituting a local oscillator of the mixer 34, 37 is a buffer, 38 is a prescaler that divides the oscillation frequency of the voltage controlled oscillator 36 input through the buffer 37 by a fixed number, and 39 is a prescaler 38. A control circuit 40 is a low-pass filter, which includes a programmable divider that frequency-divides the output of the programmable divider and a phase comparator that compares the phases of the output signal of the programmable divider and the reference frequency signal output from the reference oscillator.

The voltage controlled oscillator 36, buffer 37, prescaler 38, programmable divider and phase comparator of the control circuit 39, and a PLL loop that tracks the output of the low-pass filter oscillator 36 to the reference frequency signal are configured. The output is used as a tuning voltage to change the oscillation frequency of the voltage controlled oscillator 36 and change the capacitances of the variable capacitance diodes 31a and 33a of the antenna tuning circuit 31 and the high frequency tuning circuit 3' to select the receiving frequency.

In the PLL synthesizer tuner having the above configuration, the present invention detects the magnitude of the tuning voltage output from the low-pass filter 40 and switches the constant of the low-pass filter 40 according to the magnitude. A circuit 41 is provided to select the constant of the low-pass filter 40 in response to the change in the sensitivity constant of the voltage controlled oscillator I due to the magnitude of the tuning voltage.

As the constant switching circuit 41 mentioned above, for example, one shown in FIG. 5 can be used.

In FIG. 5, 51 is a C-MOS inverter which, together with R2 and capacitor C, constitutes a low-pass filter similar to that in FIG. Between,
Normally open contacts X□ of relays 52, 53 and 54 described below
-yo, x2-gate and Xsa are connected respectively.

The relays 52, 53 and 54 are relays that switch the capacitance between the output terminal of the inverter 51 and the resistor R2 according to the thickness of the tuning voltage output from the low-pass filter 40, and are relays that switch the capacitance between the output terminal of the inverter 51 and the resistor R2, and are is connected between the collector of transistor q1 and a power line 55 to which a power supply voltage (-Vcc) is applied, and the drive coil x2 of relay 53 is connected between the collector of transistor Q2 and power line 55, and the drive coil x2 of relay 53 is connected between the collector of transistor Q2 and power line 55. The drive coils x3 are connected between the collector of the transistor Q3 and the power supply line 55, respectively.

Resistors R, R and R5 are connected between the emitters of the transistors q□, Q2 and q3 and the power line 56 to which a power supply voltage (10 VEE) is applied, respectively.

The base of transistor q0 is connected to a node 57 between resistor R6, which has one end connected to power supply line 55, and resistor R9, which has one end connected to the anode of diode D0.The base of transistor Q2 has one end connected to power supply line 55 (this connection). At the connection point 59 between the resistor R7 and the resistor 1o whose one end is connected to the anode of the diode D2, there is also a transistor q.
The base of 3 is a resistor R8 whose one end is connected to the power supply line 55.
and a resistor R1 whose one end is connected to the anode of the diode D3.
1, respectively.

The cathodes of the diodes D□, D2, and D3 are connected to the output terminals of an operational amplifier 60, which together with resistors '12, -3, R14, and R15 constitute a well-known inverting amplifier, and output from the inverter 51. A voltage that is the inversion of the tuning voltage is applied.

Resistance values R5, R6 and R of resistors R5, R6 and R9
9 is set so that the transistor q0 is turned on when the tuning voltage is equal to or higher than the tuning voltage (minimum tuning voltage V4) corresponding to the point P4 of the curve 1 in FIG. Values R4, R7, and □. is set so that the transistor Q2 turns on when the tuning voltage becomes equal to or higher than the tuning voltage 73 corresponding to the point P23° of the curve 1, and the resistance values R3 and R8 of the resistors R8 and '11 are set.
and □, when the tuning voltage becomes equal to or higher than the tuning voltage v12 corresponding to the point P12 of the curve l, the transistor Q3
Set to turn on.

The circuit of FIG. 5 operates as follows.

Now, in Fig. 3, points Po, P1, P2 on curve l
, P23, P3 and P4 respectively,
vo, ■1, ■, 2, ■2, ■o, ■3 and 6v4 (
0〉vO〉vl・vl2〉v2〉v23〉■3〉■4
).

In FIG. 5, when the tuning voltage ■R is in the range ■k>v4, only the transistor Q□ is turned on, the drive coil X□ of the relay 52 is energized, and the normally open contact X□-3 is turned on.

Therefore, the capacitance C of the capacitor C of the low-pass filter 40
becomes C=CI.

At this time, the sensitivity constant K of the voltage controlled oscillator 36.

The value of is determined at point P3 on the above curve l, and if the capacitance C□ of capacitor C is determined from that value, v23
〉■k〉■For 4, the above curve! The sensitivity constant Ko at the upper point P3 will be selected.

When the tuning voltage ■R is in the range of ■1゜〉■k〉■23, transistors q1 and Q2 are turned on, drive coils X□ and X2 of relays 52 and 53 are energized, respectively, and normally open contacts X +a and X2-3 are respectively turned on.

Therefore, the capacitance C of the capacitor C of the low-pass filter 40
becomes C-C0+C2.

At this time, the sensitivity constant K of the voltage controlled oscillator 36.

If the value of is determined at point P2 on the curve l above, and the capacity (c, +C2) is determined from that value, ■, 2〉
■,〉■23. In this case, the sensitivity constant Ko at point P2 on the curve j is selected.

Further, when the tuning voltage ■k is in the range of vo〉■,〉■,2, the transistors Q, , Q2 and Q3 are turned on, and the drive coils X0, x2 and X3 of the relays 52, 53 and 55 are energized, respectively. , normally open contacts X1-a, X2-a and Xa a are turned on, respectively.

Therefore, the capacitance C of the capacitor C of the low-pass filter 40
becomes C= CI 0 C2 0 C3.

At this time, the sensitivity constant K of the voltage controlled oscillator 36.

The value of is determined at point P1 on the above curve j, and if the capacitance (C□+C2+C3) is determined from that value, v
o〉■k〉■□2-, the point P□ on the above curve l
The sensitivity constant Ko will be selected.

As described above, the capacitance C of the capacitor C of the low-pass filter 40 is selected depending on the magnitude of the tuning voltage VR, and the slope of the song IVill, that is, the sensitivity constant KO of the voltage-controlled oscillator 36, which changes with the tuning voltage vR, is selected. , the optimum one can be selected depending on the magnitude of the tuning voltage (R).

In the explanation of tl-L, basic embodiments of the present invention have been described, but the present invention is not limited to the above embodiments, and various configurations can be made within the scope of the gist of the present invention. .

For example, in place of the relays 52, 53 and 54 in Fig. 5, C-MOS electronic switches may be used, and a comparator which is an integrated circuit of a constant switching circuit consisting of transistors Q□, Q2, 93, etc. It is also possible to replace the capacitor C of the low-pass filter 40 with
The capacitance C may be switched using two or four or more capacitors instead of the three capacitors C1, C2, and C3.

Furthermore, instead of switching the capacitance C of the capacitor C of the low-pass filter 40, the resistance values of the resistors R□ and R2 can be changed to
, R2 may be switched.O As is clear from the above detailed explanation, the present invention provides a conventional PLL synthesizer tuner with a change in the sensitivity constant of the voltage controlled oscillator due to the magnitude of the tuning voltage. The constants of the low-pass filter are selected accordingly, and the filter characteristics of the low-pass filter are switched to select the optimal sensitivity constant according to the magnitude of the tuning voltage.
The filter characteristics of the low-pass filter (7) are optimized over the entire receiving frequency range of the tuner, and the tuner's S
/N ratio is improved, and the relationship between S/N ratio and scan time can also be optimized.

[Brief explanation of the drawing]

Figure 1 is a block diagram for explaining the PLL' small loop, Figure 2 is a circuit diagram of a conventional low-pass filter, Figure 3 is an explanatory diagram showing the relationship between the reception frequency and the tuning voltage of the tuner, and Figure 4. 5 is a block diagram of a P'LL synthesizer tuner to which the present invention is applied, and FIG. 5 is a circuit diagram of a constant switching circuit and a low-pass filter. 30... Antenna, 31... Antenna tuning circuit, 3
2... High frequency amplifier, 33... High frequency tuning circuit, 3
4...Mixer, 35...Intermediate frequency amplifier, 36...
- Voltage controlled oscillator, 37... Buffer, 38... Prescaler, 39... Control circuit L 40... Low pass filter, 41... Constant switching circuit. Patent applicant: Sharp Co., Ltd. Agent: Patent attorney: Aobai Ao and 2 others/1 Figure 1 2

Claims (1)

[Claims] (1) Compare the phases of the reference comparison frequency signal and the output signal of the voltage controlled oscillator or its frequency divided signal, output the output to a low-pass filter, and convert it into a DC voltage proportional to the phase difference between these two signals, The DC voltage is used as a tuning voltage to control the tuning frequency of the tuning circuit and the oscillation frequency of the voltage controlled oscillator, and the output of the voltage controlled oscillator is injected into the mixer to receive a signal at a frequency set by the programmable divider. In the PLL synthesizer tuner, a constant switching circuit is provided to switch the constant of the low-pass filter in accordance with the magnitude of the tuning voltage, and the constant switching circuit of the low-pass filter is provided in response to the change in the sensitivity constant of the voltage-controlled oscillator due to the magnitude of the tuning voltage. A low-pass filter for a PLL synthesizer tuner, characterized in that a constant is selected.