JPS58108823A - Level shifting circuit - Google Patents

Abstract

PURPOSE:To obtain a circuit of simple constitution which operates stably at a low voltage as a level shifting circuit which shifts a fine input signal by a specific level. CONSTITUTION:When the base-emitter forward voltage of a transistor (TR) 1 is nearly equal to that of a TR3, the level at an input terminal X is equal to the collector level of a TR2 unless the TR2 is saturated. When the level at the terminal X falls, the balancing state between the TRs 1 and 3 is not maintained any more and the emitter current of the TR3 is reduced. As a result, the base current of the TR2 increases and while the level at the terminal X is equal to the collector level of the TR2, the TRs 1 and 3 are balanced. On the other hand, an input voltage is shifted in terms of direct current by the voltage IoR depending upon the constant current Io of a constant current source 5 and the resistance value R of a resistance 4 and then supplied to a terminal Y.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a level shift circuit that level-shifts a minute input signal applied to an input terminal by a certain DC level and then transmits it to the next stage. The purpose is to realize circuits that operate stably even under low power supply voltages.

FIG. 1 shows a circuit connection diagram of a level shift circuit according to an embodiment of the present invention. In FIG. 1, the base of a transistor 1 is connected to the input terminal
The base of a transistor 2 which is complementary to the transistor 1 (NPN versus PNP) is connected to the collector of the transistor 1 . The emitter of the transistor 2 is connected to the negative power supply line 2, and the emitter of the transistor 1 and the transistor 2. The emitter and base of a transistor 3, which is diode-connected with its base and collector short-circuited, are connected between the collectors of the transistor 3. A resistor 4 as a load is connected between the collector of the transistor 2 and the output terminal Y, and the positive power supply line connects the output terminal Y.
A constant current source 6 is connected between the power supply line and the emitter of the transistor 1, and another constant current source 6 is connected between the power supply line and the emitter of the transistor 1.

The positive power supply line 1 is connected to the positive power supply terminal B, and the negative power supply line 1 is connected to the negative power supply terminal G.

Now, in FIG. 1, 1 assumes that the forward voltage between the base and emitter of transistor 1 and the forward voltage between the base and emitter of transistor 3 are almost equal, and the range where transistor 2 does not reach complete saturation is 1. In this case, the level of the input terminal X and the level of the collector of the transistor 2 are the same.

That is, if the level of the input terminal X becomes lower than before at a certain point in time, the balance between the transistors 1 and 3 will be lost, and the emitter current of the transistor 1 will increase.

The emitter current of the transistor 3 decreases.

As a result, the base current of the transistor 20 increases, and the level of the collector of the transistor 2 decreases.
When the level of the input terminal X and the level of the collector of the transistor 2 are equal, the balanced state of the transistor 1 and the transistor 3 is maintained.

On the other hand, a constant current ■ is supplied from the constant current source 6. is supplied to the resistor 4, and a constant voltage drop occurs across the resistor 4.

Here, if the resistance value of the resistor 4 is R and the signal voltage applied to the input terminal X is ei, then the signal voltage e0 appearing at the output terminal Y is expressed by the following equation.

e0=e, +IOR Therefore, the circuit shown in FIG. 1 has the function of DC-shifting the input signal applied to the input terminal X by a certain level and supplying the shifted signal to the output terminal Y.

By the way, the level shift circuit shown in FIG. 1 not only has an extremely simple circuit configuration.

Sufficiently stable operation even under low power supply voltage of around 1.6v.
You can look forward to the work.

For example, a well-known current mirror circuit can be used as the constant current sources 6 and 6, and in that case, a transistor (PNP type) constituting the current mirror circuit is placed at the constant current sources 6 and 6 in FIG. Since the collector and emitter of the first
The forward voltage between the base and emitter of transistor 3 in the figure is about 0.7V, and when handling small signals, the voltage between the collector and emitter of transistor 2 is also around 0.4V, so these voltages are Even if they are added together, the result is about 1.4V.

If you obtain it using the circuit proposed in 1.
A stable constant current source can be realized even under a power supply voltage as low as 6V.

Now, the embodiment of the present invention is not necessarily limited to the circuit shown in FIG. 1, and various changes can be made as necessary. For example, as illustrated in Fig. 2, if one circuit is made into a monolithic IC by connecting the collector of transistor 3 to the negative feed line instead of connecting it to the base, a substrate PNP transistor is used as transistor 3. This reduces the chip size, increases the operating gain, and improves tracking performance.

Further, if a resistor 7 or the like is connected between the base and emitter of the transistor 2 as necessary, the leakage current of the transistor can be bypassed, so that temperature stability can be improved.

Further, as shown in FIG. 3, a simple diode 8 may be used instead of the transistor 3, and a diode 9 may be used instead of the resistor 4.

As described above, the level shift circuit of the present invention includes a first transistor whose base is connected to the input terminal (corresponding to transistor 1 in the embodiment described above), which is complementary to the first transistor, and whose pace is a second transistor (corresponding to transistor 2) connected to the collector of the first transistor and whose emitter is connected to one power supply line; and between the emitter of the first transistor and the collector of the second transistor. diode means (corresponding to the base-emitter junction of transistor 3 or diode 8), and load means (corresponding to resistor 4 or diode 9) connected between the collector of the second transistor and the output terminal. and a first constant current means (corresponding to the constant current source 6) connected between the other feed line and the output terminal, and a first constant current means (corresponding to the constant current source 6) connected between the other feed line and the emitter of the first transistor. It is characterized by being equipped with a second constant current means (corresponding to the constant current source 6), and has the great effect of being able to operate even under a low power supply voltage with an extremely simple configuration. be.

[Brief explanation of the drawing]

1, 2, and 3 are circuit wiring diagrams of level shift circuits according to each embodiment of the present invention. 1.2, 3...---) transistor, 41... resistor, 66... constant current source, 8, 9... diode. Name of agent: Patent attorney Toshio Nakao and one other person F: Koichi... Correct) →8 oY →G →β oY →B →Y

Claims (1)

[Claims] (1) A first transistor whose base is connected to the input terminal, and which is complementary to the first transistor, whose base is connected to the collector of the first transistor, and whose emitter is connected to one of the power supply lines. a second transistor, a diode means connected between the emitter of the first transistor and the collector of the second transistor, and a load connected between the collector of the second transistor and the output terminal. a first constant current means connected between the other feed line and the output terminal; and a second constant current means connected between the other feed line and the emitter of the first transistor. A level shift circuit characterized by being equipped with. (→ In the description of claim (1), the third
The base of the transistor is connected to the collector of the second transistor, the emitter of the transistor is connected to the emitter of the first transistor, and the collector is connected to one of the feed lines, and the base of the third transistor is connected to the collector of the second transistor. - A level shift circuit characterized in that the diode means is constructed by an intermembrane junction.