JPH032987Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a bias current supply circuit in an IC circuit.

An object of the present invention is to realize a circuit that supplies a constant bias current to a load that is independent of temperature, power supply voltage fluctuations, and load. Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention. In the figure, lv is a power line to which a power supply voltage V+ is applied, and lc is a common line connected to a ground point GND. R ₁ is a resistor, D ₁ is a zener diode,
L ₁ and L ₂ are loads, respectively. Q _1R , Q _1D , Q _1L1 ,
Q _1L2 , Q _2R , Q _2D , Q _2L1 , and Q _2L2 are each PNP transistors, and Q _3R and Q _3D are each NPN transistors.
The emitter of Q _1R is connected to the power supply line lv, the collector of Q _1R is connected to the emitter of Q _2R , the collector of Q _2R is connected to the collector of Q _3R , and the emitter of Q _3R is connected to one end h of resistor R _1. The series circuit of Q _1R , Q _2R and Q _3R is a circuit that supplies bias current I _R to R ₁ . This series circuit is called a resistive current supply circuit. Similarly, the series circuit of Q _1D , Q _2D and Q _3D is a circuit that supplies a bias current to the Zener diode D ₁ , and this circuit is named a Zener current supply circuit. Also, the series circuit of Q _1L1 and Q _2L1 is loaded
This circuit supplies bias current I _L1 to _L1 , and this circuit is called a load current supply circuit. The series circuit of Q _1L2 and Q _2L2 is also a load current supply circuit. The emitters of the transistors Q _1R , Q _1D , Q _1L1 , and Q _1L2 are connected to the power supply line lv, and their bases are commonly connected. Also, the base and collector of Q _1R are connected. The bases of Q _2R , Q _2D , Q _2L1 , and Q _2L2 are commonly connected. Q _1R , Q _1D , Q _1L1 , and Q _1L2 are transistors that determine the current ratio of each bias current supply circuit, and the current ratio of each circuit is determined according to the ratio of the emitter areas of each transistor. The transistor that determines these current ratios is called a first transistor.
Transistors Q _2R , Q _2D , Q _2L1 , Q _2L2 whose emitters are connected to the collectors of each first transistor, respectively.
are each of the first transistors Q _1R , Q _1D , Q _1L1 , Q _1L2
The collector-base voltage of is set to a constant value, i.e.
This is a transistor to keep it at OV. These transistors Q _2R , Q _2D , Q _2L1 , and Q _2L2 are called second transistors. Also, a transistor Q _3R inserted between the second transistor Q _2R of the resistive current supply circuit and one end of the resistor R ₁ , and a second transistor Q _2D of the Zener current supply circuit and the Zener diode
A transistor inserted between the cathode d ₁ of D ₁
Q _3D is called the third transistor. The cathode d ₁ of the Zener diode D ₁ is connected to one end h of the resistor R ₁ and the base of Q _3R .
It is connected through the emitter circuit and the base-emitter circuit of Q _3D , and the voltage V _R between the terminals of the resistor _R1 is determined by the Zener voltage V _D1 of the Zener diode.
Further, the value of resistor R ₁ determines the current value I _R flowing through R ₁ . Q _F is a FET whose gate electrode is connected to the ground point and is a startup transistor when the power supply voltage is switched in to the power supply line. In addition,
Q _3R and Q _2D are diode connections that short the base and collector.

The operation of the embodiment shown in FIG. 1 will be explained as follows. When the power supply voltage V+ is applied to the power supply line lv, the drain and source of Q _F become conductive, and all circuits that are supplied with the emitter current of Q _3R and the base current of Q _3D from the source S of Q _F operate. state. Now, each first transistor Q _1R , Q _1D ,
Q _1L1 and Q _1L2 are transistors with the same structure.
If Q _1R and Q _1D have the same structure, the current I _R flowing through the resistor R ₁ and the current _ID flowing through the Zener diode D ₁ are the same. and the first transistor Q _1R and
Since the base-collector voltage of _Q1D is always OV, the current ratio I _R :I _D remains constant even if the power supply voltage V+ changes. Similarly, since the base-collector voltage of Q _1L1 and Q _1L2 is OV, the ratio of the load currents I _L1 and I _L2 flowing through these transistors does not depend on the power supply voltage V+ and the load. Therefore,
The ratio of each current I _R :I _D :I _L1 :I _L2 is kept constant. Next, considering the current I _R flowing through the resistor R ₁ ,
As mentioned above, the current I _R flowing from the emitter of Q _3R to R ₁ is equal to the current I _D flowing from the emitter of Q _3D to D ₁ , and the base-emitter voltage V _{BE (R)} of Q _{3R is equal to the current I R flowing from the emitter of Q 3D} to D 1.
The base-emitter voltages V _{BE (D)} of Q _3D are equal and both exhibit the same temperature characteristics, so if the Zener voltage of the Zener diode D ₁ is V _D1 , the current I _R flowing through the resistor R ₁ is V _D1 /R ₁ . If V _D1 and R ₁ both have positive temperature coefficients and their values are chosen to be equal, the current I _R flowing through R ₁ will be maintained at a constant value even if the temperature changes. In this way, it is possible to supply the loads L ₁ , L _{2 ,} etc. with a bias current that is based on I _R and is independent of the temperature, power supply voltage, and resistance value of the loads.

If the temperature coefficient of the zener voltage V _D1 is positive and the temperature coefficient of the resistor R ₁ is larger, R ₁
By removing the third transistor Q _3R connected to , it is possible to correct the voltage across the resistor R ₁ by the base-emitter voltage V _{BE (D)} of the third transistor Q _3D which has a negative temperature coefficient. can.

In the above embodiment, the first transistors Q _1R , Q _1D , Q _1L1 , and Q _1L2 included in each current supply circuit have the same structure, and the currents I _R , I _D , I _L1 supplied to each element , I _L2 are the same, but the present invention is not limited to this. It is sufficient that each first transistor has a structure in which the ratio of the currents supplied to each element R ₁ , D ₁ , L ₁ , L ₂ is kept constant. Furthermore, the number of loads is not limited to two, and may be one or more. .

According to the present invention, it is possible to realize a bias current supply circuit that is independent of ambient temperature, power supply voltage, and load. In addition, the first transistor Q _1R included in the current supply circuit of each element R ₁ , D ₁ , L ₁ , L ₂ ,
The bases of Q _1D , Q _1L1 , Q _1L2 , etc. and the bases of the second transistors Q _2R , Q _2D , Q _2L1 , Q _2L2 , etc. are connected in common, so each of the first and second transistors is connected to an IC. Since they can be integrated into the same isolation area of the substrate, these transistors can be realized in a relatively small area.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention. FIG. 2 shows the main structure of another embodiment of the present invention. Q _1R , Q _1D , Q _1L1 , Q _1L2 ... first transistor,
Q _2R , Q _2D , Q _2L1 , Q _2L2 ... second transistor,
Q _3R , Q _3D ...Third transistor, _R1 ...Resistor,
D ₁ ... Zener diode, L ₁ , L ₂ ... Load, lv
...Power line, LC...Common line, Q _F ...
FET.

Claims (1)

[Claims for Utility Model Registration] (1) A first transistor Q1R whose emitter is connected to a power supply line, a second transistor Q2R whose emitter is connected to the collector of this first transistor, and a second transistor Q2R whose emitter is connected to the collector of this first transistor; A third transistor Q3R whose collector is connected to the collector of the transistor, and a resistor R inserted and connected between the emitter of this third transistor and a common line.
1, a fourth transistor Q1D whose emitter is connected to a power supply line, a fifth transistor Q2D whose emitter is connected to the collector of this fourth transistor, and a collector of this fifth transistor. A sixth transistor Q3D whose collector is connected to the base of the third transistor Q3R and whose anode is connected to the common line between the emitter of the sixth transistor and the common line. a Zener current supply circuit including an inserted Zener diode D1; a seventh Zener current supply circuit having an emitter connected to the power supply line;
transistors Q1L1, Q1L2, and an eighth transistor Q2L1, Q2L2 whose emitter is connected to the collector of this seventh transistor.
and loads L1 and L2 inserted and connected between the collector of this eighth transistor and the common line.
first, fourth, and seventh transistors Q1R, Q1 each having an emitter connected to the power supply line;
The bases of D, Q1L1, and Q1L2 are connected in common, and the bases of the second, fifth, and eighth
Each transistor Q2R, Q2D, Q2L1,
The bases of Q2L2 are connected in common to each of the first, third, and fifth transistors Q1.
A bias current supply circuit characterized in that the bases and collectors of R, Q3R, and Q2D are connected in common, and the temperature coefficients of the resistor R1 and the Zener diode D1 are matched. (2) The third transistor Q3R is omitted, and the base of the sixth transistor Q3D is connected to the second
connected to the collector of the transistor Q2R, and matched in temperature coefficient of a series circuit consisting of the resistor R1 and the base-emitter circuit of the Zener diode D1 and the sixth transistor Q3D connected thereto. A bias current supply circuit according to claim 1 of the utility model registration claim.