JPS58105658A - Adaptive type modulating equipment - Google Patents

Adaptive type modulating equipment

Info

Publication number
JPS58105658A
JPS58105658A JP56204120A JP20412081A JPS58105658A JP S58105658 A JPS58105658 A JP S58105658A JP 56204120 A JP56204120 A JP 56204120A JP 20412081 A JP20412081 A JP 20412081A JP S58105658 A JPS58105658 A JP S58105658A
Authority
JP
Japan
Prior art keywords
output
circuit
memory
amplifier
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56204120A
Other languages
Japanese (ja)
Other versions
JPH0363265B2 (en
Inventor
Yukitsuna Furuya
之綱 古谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56204120A priority Critical patent/JPS58105658A/en
Publication of JPS58105658A publication Critical patent/JPS58105658A/en
Publication of JPH0363265B2 publication Critical patent/JPH0363265B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50Transmitters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/62Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To obtain a proper amplitude and phase with an output, by distorting the input of the nonlinear amplifier in advance. CONSTITUTION:Transmitting data series are inputted in parallel from an input terminal 100 and become addresses of an RAM 10 and an ROM 20. An original signal point arrangement is stored in the ROM 20 as a complex number value, and a value which is distorted so that the output of a nonlinear amplifier becomes a proper signal point is stored in the RAM 10 as a complex number value. The output of the ROM 20 is DC-AC converted after it is converted into an analog signal by a DA converter 30, and outputted to the nonlinear amplifier through a terminal 101. To adaptively change the content of the RAM 10, the output of the nonlinear amplifier is inputted through a terminal 102 and demodulated by a demodulating circuit 60. The signal is subtracted 80 by a signal read out from the ROM 20 and multiplied by a fixed coefficient at a correcting amount generating circuit 90, and then, added to the output of the RAM10.

Description

【発明の詳細な説明】 本発明は多値変調、と〕わけ直交振幅変調のように搬送
波の振幅及び位相を情報として用−る多値変調にシーで
、増幅器の非直線性を補償するために予め送信パタ/を
変形させて送出する変調製置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention is applicable to multilevel modulation, especially multilevel modulation that uses the amplitude and phase of a carrier wave as information, such as quadrature amplitude modulation, to compensate for the nonlinearity of an amplifier. The present invention relates to a modulation device that transforms a transmission pattern in advance and sends it out.

従来、多値変調器においては、増幅器の飽和領域におけ
る非直線性による劣化を避けるため、増幅器の出力を最
大出力からかな)下ったレベルで動作させて一九、この
ような増幅器の利用方法では、消費電力が大きい割に大
きな出力が得られず増幅器の電力利用効率が悪−と−う
欠点があった。
Conventionally, in multilevel modulators, the output of the amplifier is operated at a level lower than the maximum output in order to avoid deterioration due to nonlinearity in the saturation region of the amplifier. However, it had the disadvantage that a large output could not be obtained despite the large power consumption, and the power utilization efficiency of the amplifier was poor.

の出力電力を得ることのできる適応製変調装置を提供す
ることにある。
An object of the present invention is to provide an adaptive modulation device that can obtain an output power of .

本発明によれば、多値ディジタル通信にお―て。According to the present invention, in multilevel digital communication.

入力信号系列に対応して送信信号を出力する書換え可能
なIllのメモリーと#記入力信号系列に対応して、送
信信号を出力する内容固定の@20メモリ−と前記第1
のメモリーの出力で搬送波を変調し非線形増幅器へ出方
する変tR回路と、前記非線形増幅器の出力を復調する
復調回路と、前記復調−路の出力を前記第′2のメモリ
ーの出方から減算する減算回路と、前記減算回路の出方
から修正量を発生させる修正量発生回路と、前記修正量
発生回路の出力を前記@lのメモリー出方と加算する加
算回路とから構成され、前記加算回路出力をtiI紀I
Ilのメモリーに書き込むことで前記第1のメモリーの
内容を適応的に変化させることを!¥!徴とした遍応蓋
変調装置を得ることができる。
A rewritable Ill memory that outputs a transmission signal in response to an input signal series, a @20 memory with fixed content that outputs a transmission signal in response to an input signal series, and the first
a modulation tR circuit that modulates a carrier wave with the output of the memory and outputs it to the nonlinear amplifier, a demodulation circuit that demodulates the output of the nonlinear amplifier, and subtracts the output of the demodulation path from the output of the '2nd memory. a correction amount generation circuit that generates a correction amount from the output of the subtraction circuit, and an addition circuit that adds the output of the correction amount generation circuit to the memory output of the @l, The circuit output is
Adaptively change the contents of the first memory by writing to the memory of Il! ¥! It is possible to obtain a unidirectional lid modulator with a characteristic characteristic.

次に図面を参照して本発明について詳細に説明する。Next, the present invention will be explained in detail with reference to the drawings.

第1図は通常の増幅器の入出力特性を示す図である0通
常の増幅器の非線形特性はAM−AM変換と呼ばれる出
力振幅の飽和特性と、AM−PM変換と呼ばれ為出力位
相の入力振幅による変化がある。
Figure 1 is a diagram showing the input/output characteristics of a normal amplifier.The nonlinear characteristics of a normal amplifier are the saturation characteristic of the output amplitude called AM-AM conversion, and the input amplitude of the output phase called AM-PM conversion. There are changes due to

入力振幅が飽和点から十分小さい点では、振幅特性は直
線でh)位相の変化もな−、しかしながら、入力振幅が
飽和点に近づくにつれて、出力振幅は、飽和し、出力位
相は回転し始める。従って多値伝ム 送においては動作点を飽和レベルよりはるかに夕さi値
にしてこの増幅器の非直線性を避けるようにしてきえ。
At a point where the input amplitude is sufficiently small from the saturation point, the amplitude characteristic is linear and there is no change in phase.However, as the input amplitude approaches the saturation point, the output amplitude becomes saturated and the output phase begins to rotate. Therefore, in multilevel transmission, the operating point should be set at a value far below the saturation level to avoid this nonlinearity of the amplifier.

第2図は非線形増幅器の信号に対する形番を示して―る
。変調は16[QAMの場合を想定している。@2図1
1)は動作点を低くした場合の増幅器出力の位相平面に
おける信号点の分布であり、第2図(27は動作威を飽
和レベルの近くにしたときの増幅器出力の位相平面にお
ける信号点の分布を示す。
Figure 2 shows the model numbers for nonlinear amplifier signals. It is assumed that the modulation is 16[QAM]. @2 Figure 1
Figure 1) shows the distribution of signal points in the phase plane of the amplifier output when the operating point is lowered, and Figure 2 (27) shows the distribution of signal points in the phase plane of the amplifier output when the operating point is lowered to near the saturation level. shows.

第2図(2)の信号点は+1)の信号点に比して歪んで
いる。受信機は第2図(1)の信号点が送られ九ものと
して判定を行なうので、1!2図(21のような信号点
が送られると、小さな雑音にょうて誤ヤを起してしまう
0本発明の変調器は、非線形増幅器の入力を予め歪ませ
ておき、出方で第**(ttのように正し一振幅と位相
が得られる様にする方式で増幅器の非線形性の影響をと
)除くものである。
The signal point in FIG. 2 (2) is distorted compared to the signal point +1). The receiver judges that the signal point in Figure 2 (1) is sent as 9, so if the signal point in Figure 1!2 (21) is sent, it will cause an error due to small noise. The modulator of the present invention distorts the input of the nonlinear amplifier in advance, and the nonlinearity of the amplifier is distorted in such a way that a correct amplitude and phase is obtained at the output. effect).

第3図に本発明の一実施例を示す。FIG. 3 shows an embodiment of the present invention.

入力端子100からは送信データ系列が並列に入力され
る。16値QAMO場合は4ビツトになる。
Transmission data sequences are input in parallel from the input terminal 100. In the case of 16-value QAMO, it is 4 bits.

@3図中の結線上の斜線は複数の結線を示す、送信デー
タ系列は@71のメモリーであるラング^・アクセス・
メモリーto (RAM(Random 1ccess
 MImry))及び、第2のメモリーであるり一ド・
オンリー・メモリー20 (ROM(Read 0nl
y Memoryl 〕7 )’ V X トなる@ 
ROM20には第2図(1)のような本来の信号点配置
が複素数数値として記憶されてお如、RAM10の内容
は非鐘形増幅器出力が正し一信号点になる様に歪ませた
値が同じく複素数値として入れられて−る*RAM1o
の出力はディジタル・アナログ変換f+30でアナログ
信号に変換され死後変調回路40で発振器51の出力−
を直交変調し端子101から非線形増幅器へ出力される
*RAMtoの内容を適応的に変化させるために、非線
形増幅器の出力を端子102から入力し復調回路60で
発振器51を用−で復調する。変調回路40及び、復調
祠路60KJ’fjHられる発振器51は同″−のもの
を用−ることができるので復調回路601Cはキャリア
抽出回路は不要である。復調回路60で復調され良信号
け、アナログ・ディジタル変換1i)70で複素ディジ
タル信号に変換される、この復調された複素ディジタル
信号をROM20から読み出される本来あるべき信号か
ら減算回路sOで減算し、その結果を修正量発生回路9
[1で一定係数に倍して(一般にktilよや十分小さ
な値にする)、RAMl0から読み出された出力に加算
回路91で加える。もしも復調された値がROM20か
らの本来あるべき値よりも大きめときは8ムMIOの内
容を小さくする様に制御し、復調された値がROM20
からの本来あるべき値よ〉も小さ−ときは几ムMIOの
内容を大きくする様に制御する。この機にすることによ
って本発明の変調装置は非線形増幅器の入出力特性が九
とえ変化しても、常に非線形増幅器の出力、すなわち端
子102からの入力信号が第2図(1)の*に正しい信
号点配置に壜る様KRAMIOの内容を制御することが
できる。仮に非線形増幅器の入出力特性が第2図11)
のような信号を入力して第2図(2)の様な出力を得る
ようなものであるとすると、その場合のlLANl0の
内容は第411に示す様な信号点配置になる、この様な
RAM100信号点を非線形増幅器を通すと、第2図(
1)Owt信号点が得られる。
@3 The diagonal lines above the connections in the diagram indicate multiple connections.
Memory to (RAM(Random 1ccess
MImry)) and the second memory
Only Memory 20 (ROM (Read 0nl)
y Memoryl 〕7)' V
The original signal point arrangement as shown in Fig. 2 (1) is stored in the ROM 20 as a complex number value, and the contents of the RAM 10 are values distorted so that the output of the non-bell-shaped amplifier becomes a single signal point. is also stored as a complex value *RAM1o
The output of oscillator 51 is converted into an analog signal by digital-to-analog converter f+30, and output from oscillator 51 by postmortem modulation circuit 40.
In order to orthogonally modulate and adaptively change the contents of *RAMto output from terminal 101 to the nonlinear amplifier, the output of the nonlinear amplifier is input from terminal 102 and demodulated by demodulation circuit 60 using oscillator 51. The same oscillator 51 can be used for the modulation circuit 40 and the demodulation circuit 60KJ'fjH, so the demodulation circuit 601C does not require a carrier extraction circuit.If a good signal is demodulated by the demodulation circuit 60, This demodulated complex digital signal, which is converted into a complex digital signal by the analog-to-digital conversion 1i) 70, is subtracted from the original signal read from the ROM 20 by a subtraction circuit sO, and the result is subtracted by the correction amount generation circuit 9.
[Multiply by 1 by a constant coefficient (generally a sufficiently smaller value than ktil), and add it to the output read from RAM10 in adder circuit 91. If the demodulated value is larger than the original value from the ROM 20, the content of the 8mm MIO is controlled to be smaller, and the demodulated value is transferred to the ROM 20.
If the original value from 1 is also small, control is performed to increase the contents of the MIO. By using this mechanism, the modulation device of the present invention is such that even if the input/output characteristics of the nonlinear amplifier change, the output of the nonlinear amplifier, that is, the input signal from the terminal 102 will always be at * in Fig. 2 (1). The contents of KRAMIO can be controlled to ensure the correct signal point arrangement. Suppose that the input/output characteristics of a nonlinear amplifier are as shown in Fig. 2 (11)
If we input a signal like this and get an output like that shown in Figure 2 (2), the contents of lLANl0 in that case will have a signal point arrangement as shown in Fig. 411. When the RAM 100 signal points are passed through a nonlinear amplifier, the result shown in Fig. 2 (
1) Owt signal point is obtained.

なお、本実施例では修正量発生回路を一定係数に倍する
ものとして説明したが、減算回路80の出力の符号のみ
を保持し、大きさは一定の小さな値にする様1回路を修
正量発生回路として用いてもl113様O効来が得られ
る。なお、本実施例では、16値QAM変調について説
明したが、他のどの様なQAM変調方式につ―ても同様
の方式で非線形増幅器による劣化を防ぐことができるの
は明らかである。
In this embodiment, the correction amount generation circuit was described as one that multiplies by a constant coefficient, but one circuit is used to generate the correction amount so that only the sign of the output of the subtraction circuit 80 is retained and the magnitude is a constant small value. Even when used as a circuit, the l113-like O effect can be obtained. In this embodiment, 16-level QAM modulation has been described, but it is clear that deterioration due to nonlinear amplifiers can be prevented using a similar method for any other QAM modulation method.

以上記したように、本発明の変調装置は自動的に非線形
増幅器の特性に合せて非線形槽@器の出力が正しい信号
点になるようにすることができ、調整がきわめて容易で
ある。を九、増幅器の特性の温度による変化に対して一
追従させることができる。
As described above, the modulation device of the present invention can automatically adjust the output of the nonlinear amplifier to the correct signal point in accordance with the characteristics of the nonlinear amplifier, and adjustment is extremely easy. (9) It is possible to follow changes in amplifier characteristics due to temperature.

また、第3図の実施例においてディジタル・アナログ変
換器30からアナログ・ディジタル変換570までの遅
延時間がシンボル周期以上になる場合にはROM20の
出力に遅延回路を入れることで対処すれば良い、その場
合、RAMの書込みアドレスも、同様に遅延させて読み
出しアドレスと切換える必要がある。
Furthermore, in the embodiment shown in FIG. 3, if the delay time from the digital-to-analog converter 30 to the analog-to-digital converter 570 is longer than the symbol period, this can be dealt with by inserting a delay circuit into the output of the ROM 20. In this case, it is necessary to similarly delay the write address of the RAM and switch it to the read address.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は非線形増幅器の入出力特性を示す図、第2tH
ト16値QAM信号の非線形増幅器による歪を示す図、
第3図は本発明の1実施例を示す図で参照数字IQ、 
20.40.50.60.80.90.91はそれぞれ
第1のメモリー、第2のメモリー変調回路、非線形増幅
器、復調回路、減算回路、修正量発生回路、加算回路を
示す、第4図はRAMl0に記憶される信号点を示す図
である。 第 1 図 入力垢幅 毛3図 準4−図
Figure 1 is a diagram showing the input/output characteristics of a nonlinear amplifier, and the 2nd tH
A diagram showing distortion caused by a nonlinear amplifier of a 16-level QAM signal,
FIG. 3 is a diagram showing one embodiment of the present invention, with reference numerals IQ,
20, 40, 50, 60, 80, 90, 91 respectively indicate a first memory, a second memory modulation circuit, a nonlinear amplifier, a demodulation circuit, a subtraction circuit, a correction amount generation circuit, and an addition circuit. It is a figure which shows the signal point memorize|stored in RAM10. Figure 1: Input swab hair, Figure 3, Quasi-4-Figure

Claims (1)

【特許請求の範囲】[Claims] 多値ディジタル通信において、入力信号系列に対応して
送信信号を出力する書換え可能な第1のメモリーと前記
入力信号系列に対応して、送信信号を出力する内容固定
の第2のメモリーと、#I記第1のメモリーの出力で搬
送波を変調し非鐘形増幅器へ出力する変調回路と、#記
非tsy#増幅器の出力を復調する復調回路と、前記復
調回路の出力を前記82のメモリーの出力から減算する
減算回路と、鍵記減算呵路の出力から修正量を発生させ
る修正量発生口路と、前記修正量発生回路の出力を前記
第1のメモリー出力と加算する加算1路とから構成され
、前記加算回路出力を前記第1のメモリーに書き込むこ
とで前記第1のメモリーの内容を適応的に変化させるこ
とを%做とした適応型変調側L
In multilevel digital communication, a rewritable first memory outputs a transmission signal in response to an input signal series; a second memory with fixed content outputs a transmission signal in response to the input signal series; A modulation circuit that modulates a carrier wave with the output of the first memory and outputs it to the non-bell amplifier; a demodulation circuit that demodulates the output of the non-tsy # amplifier; A subtraction circuit that subtracts from the output, a correction amount generation path that generates a correction amount from the output of the key subtraction circuit, and an addition path that adds the output of the correction amount generation circuit to the first memory output. an adaptive modulation side L configured to adaptively change the content of the first memory by writing the output of the adder circuit to the first memory;
JP56204120A 1981-12-17 1981-12-17 Adaptive type modulating equipment Granted JPS58105658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56204120A JPS58105658A (en) 1981-12-17 1981-12-17 Adaptive type modulating equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56204120A JPS58105658A (en) 1981-12-17 1981-12-17 Adaptive type modulating equipment

Publications (2)

Publication Number Publication Date
JPS58105658A true JPS58105658A (en) 1983-06-23
JPH0363265B2 JPH0363265B2 (en) 1991-09-30

Family

ID=16485144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56204120A Granted JPS58105658A (en) 1981-12-17 1981-12-17 Adaptive type modulating equipment

Country Status (1)

Country Link
JP (1) JPS58105658A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134190A (en) * 1984-12-05 1986-06-21 Matsushita Electric Ind Co Ltd Video signal recording and reproducing device
JPH02137553A (en) * 1988-11-18 1990-05-25 Fujitsu General Ltd Digital modulation system
JPH02288535A (en) * 1989-04-28 1990-11-28 Matsushita Electric Ind Co Ltd Transmission equipment
JPH04100355A (en) * 1990-08-17 1992-04-02 Miyoshi Denshi Kk Modulation circuit
US5164678A (en) * 1990-07-12 1992-11-17 Asea Brown Boveri Ltd Process for compensating nonlinearities in an amplifier circuit
US6201841B1 (en) 1994-12-07 2001-03-13 Fujitsu Limited Distortion compensating device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134190A (en) * 1984-12-05 1986-06-21 Matsushita Electric Ind Co Ltd Video signal recording and reproducing device
JPH02137553A (en) * 1988-11-18 1990-05-25 Fujitsu General Ltd Digital modulation system
JPH02288535A (en) * 1989-04-28 1990-11-28 Matsushita Electric Ind Co Ltd Transmission equipment
US5164678A (en) * 1990-07-12 1992-11-17 Asea Brown Boveri Ltd Process for compensating nonlinearities in an amplifier circuit
JPH04100355A (en) * 1990-08-17 1992-04-02 Miyoshi Denshi Kk Modulation circuit
US6201841B1 (en) 1994-12-07 2001-03-13 Fujitsu Limited Distortion compensating device
US6987814B2 (en) 1994-12-07 2006-01-17 Fujitsu Limited Distortion compensating device

Also Published As

Publication number Publication date
JPH0363265B2 (en) 1991-09-30

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