KR100251385B1 - Apparatus and method for linearizing power amp with adaptive predistortion and modem error compensation - Google Patents

Abstract

PURPOSE: A linearization device and method of a power amplifier are provided to compensate a gain error and a phase error of a modulator/demodulator by including an algorithm capable of compensating the gain error and the phase error. CONSTITUTION: A compensation memory address generator(166) generates an address of a compensation memory from a base band signal of pre-distorted I-channel and Q channel outputted by mixers(102,104). A quadrature modulation compensation RAM(136) stores data for storing a modulation error, and outputs each varied parameter to a modulation compensator(106) by varying each parameter adaptively according to outputs of a modulation error generator(132) and the compensation memory address generator(166). A quadrature demodulation compensation RAM(164) stores data for compensating a demodulation error, and outputs each varied parameter to a demodulation compensator(146) by varying each parameter adaptively according to outputs of a demodulation error generator(134) and the compensation memory address generator(166).

Description

Linearization device and method of power amplifier

The present invention relates to an apparatus and method for linearizing a power amplifier of a communication system, and more particularly, to an apparatus capable of compensating for the distortion of an output spectrum and an error generated in a modulator by adaptively compensating a nonlinear characteristic of an active element included in a transmitter. And to a method.

High power amplifiers (HPAs), which are used to transmit analog data or digital data in wireless communication systems such as mobile communication, require a method of increasing spectrum efficiency with high power efficiency, which is within a limited frequency band. This is to configure the system with less power consumption. In order to satisfy the general requirements of such a mobile communication system, a baseband data modulation method using high-spectrum efficiency such as Quadrature Phase Shift Keying (QPSK) or Quadratue Amplitude Modulatior (QAM) is used. In addition, high efficiency power amplifiers, such as Class C, are used to increase power efficiency. These high efficiency amplifiers generally have very strong nonlinear characteristics, in particular constant envelope characteristics such as QPSK or QAM. Unmodulated signals pass through power amplifiers with these nonlinear characteristics, causing distortion such as sidelobe reproduction in the output spectrum.

Various methods have been proposed to prevent the distortion of the output spectrum caused by the nonlinear characteristics of the power amplifier, one of which adaptively tracks the nonlinear characteristics of the power amplifier to track the baseband data of the power amplifier. It is a method of compensating the nonlinear characteristics of a high power amplifier by predistorting a signal in advance in a manner opposite to that distorted by the nonlinear characteristics.

FIG. 1 illustrates a configuration of a linearization apparatus of a conventional power amplifier employing an adaptive predistortion method among the power amplifier compensation methods.

Referring to FIG. 1, k-bit data encoded by an encoder (not shown) is input to a shift register 10 and a modulation select ROM 52. The shift register 10 has a length of an L-symbol span and an output has a size of LK bits. In this case, the length L of the shift register 10 is sufficient if there is no system filtering, but the length of the shift register 10 should be longer than 1 symbol if there is a linear distortion caused by the filtering present in the system. The output of the LK bit of the shift register 10 is input to a predistortion ram 12 that outputs pre-distorted data for transmission to the RF transmitter.

The output of the predistortion RAM 12 is applied to the 1-channel digital to analog converter 14 and the Q-channel digital to analog converter 16, respectively, for transmission. The converters 14 and 16 convert predistorted digital data into analog signals, respectively. The signals converted by the D / A converter 14 and the D / A converter 16 are low-pass filtered at the corresponding low-pass filters 18 and 20, respectively, and then converted into intermediate frequency signals by a quadrature modulator 22. At this time, the intermediate frequency output from the modulator 22 is determined by an intermediate frequency oscillation 32, and is converted to the final RF transmission frequency by the mixer 24. The frequency of the signal output from the mixer 24 is determined by the Fc oscillator 28, the output of the mixer 24 is finally amplified by a power amplifier (26) and then transmitted through the antenna.

Part of the output of the power amplifier 26 is fed back to the mixer 30 by being fed back by a signal coupler 54. The mixer 30 converts the Fc oscillator 28 and the final output RF signal into a 1st intermediate frequency signal. The signal converted to the intermediate frequency in the mixer 30 is converted into baseband data by a demodulator 34. The local oscillation signal used here is the IF oscillator 32. The signal converted to the baseband by the demodulator 34 is compared with the output signals of the D / A converters 48 and 50 which are used as reference signals for generating error signals in the analog adders 40 and 42, wherein the D / A The input signals of converters 48 and 50 are the outputs of the modulation select ROM 52, and the outputs of the D / A converters 48 and 50 are fed back to update the value of the predistortion RAM 12. Used as a reference signal for comparison with the signal. The reference and feedback signals added by the analog adders 40 and 42 are added to the digital output of the predistortion RAM 12, which are converted into digital signals by the A / D converters 38 and 44, respectively. The outputs of the digital adders 36 and 46 are input to the data bus of the predistortion RAM 12, and are written to the address determined by the shift register 10 to finally complete the predistortion process for the baseband data.

However, the predistortion method having the structure as shown in FIG. 1 should use shift register 10 for address generation and modulation selection ROM 52 to obtain a reference signal for generating an error signal. In addition, an error signal is used to update the value of the predistortion RAM 12. In this case, an analog signal should be used to generate the necessary error signal. However, high accuracy adders 40 and 42 are required to obtain a precise error signal, which is difficult to configure as an analog circuit and has a limit in accuracy.

In addition, the method of improving the linearization function of the power amplifier using the predistortion method as described above does not consider the effects of the gain error and the phase error due to the incompleteness of the modulator included in the transmitter and the receiver. There is a limit to improvement. For example, according to a recently published paper, the performance degradation of the entire system due to the gain imbalance and phase error of each I and Q terminals generated by the modulator included in the transmitter is about 3.9dB in terms of bit error rate.

Accordingly, an object of the present invention is to provide an apparatus and method for linearizing a power amplifier capable of compensating for distortion of an output transmission signal by adaptively compensating for nonlinear characteristics of an active element included in a transmitter in a communication system.

Another object of the present invention is to provide an apparatus and method for linearizing a power amplifier capable of compensating for a distortion of an output transmission signal by compensating for an error of a modulator in a communication system.

An apparatus for linearizing a power amplifier of a communication system according to an embodiment of the present invention for achieving the above object includes a means for generating a baseband signal, an address generator for generating an address corresponding to the magnitude of the baseband signal, and the address; A predistortion table for outputting predistortion data at a position corresponding to the predistortion table, a mixer for mixing the baseband signal and the predistortion data, and a modulator for modulating the predistorted baseband signal to generate a transmission signal. A power amplifier for power amplifying and outputting the output of the modulator, a demodulator for demodulating the output of the power amplifier to a baseband signal, a delay for delaying the baseband signal, the delayed baseband signal and the demodulation signal And a predistortion updater for generating updated predistortion data according to the difference and storing the predistortion data in the predistortion table.

1 is a diagram showing the configuration of a conventional power amplifier linearization device.

2 is a diagram illustrating a configuration of a linearization device of a power amplifier according to an embodiment of the present invention.

The linearization method of the power amplifier according to the embodiment of the present invention is based on the size of digital data input without using a shift register in the addressing method of a lookup table that stores predistortion data for generating predistorted data. Generate an address directly. In order to generate a feedback signal and a reference signal for comparing it, without inputting a modulation selection ROM or a D / A converter, the received digital signal is fed back by adjusting the delay time using an algorithmic delay. Take care of it in a synchronized manner. In addition, a modulator error compensation circuit is added to compensate for the performance imbalance of the system due to the phase imbalance and the gain imbalance due to the imperfections of the transmitter and receiver, which greatly affect the overall system performance.

2 is a diagram illustrating a configuration of a linearization apparatus of a power amplifier according to an embodiment of the present invention.

Referring to FIG. 2, the digital shaping filter 100 generates baseband I-signals and Q-arms. The multipliers 102 and 104 multiply the baseband signals of the I and Q channels output from the corresponding digital shaping filter 100 and the predistortion data output from the predistortion lookup table 138, respectively. The Quadrature Modulator Compesation block (QMC) 106 generates quadrature modulator correction data for correcting the gain error and the phase error of the modulator 116. The D / A converters 108 and 112 convert corresponding modulation correction data output from the modulation compensator 106 into analog signals. The low pass filters 110 and 114 remove unnecessary high frequency components from the corresponding outputs of the D / A converters 108 and 112, respectively. Quadrature modulator 116 quadrature modulates the outputs of the lowpass filters 110 and 114. Oscillator 122 generates a local oscillation signal of modulator 116 and quadrature demodulator 156. The power amplifier 118 amplifies and outputs a modulated signal output from the modulator 116 to a transmission power level.

A directional coupler 120 couples a portion of the output of the power amplifier 118 to form a feedback path. Attenuator 158 attenuates the output of the directional coupler 120. Quadrature demodulator 156 demodulates the output of attenuator 158. The low pass filters 150 and 154 low pass filter demodulated signals of the I and Q channels output from the demodulator 156. The A / D converters 148 and 152 convert the analog signals output from the corresponding low pass filters 150 and 154 into digital data, respectively. A Quadrature Demodulation Compensation Block (QDMC) 146 inputs data of I and Q channels output from the A / D converters 148 and 152 to correct gain and phase errors generated during demodulation in the quadrature demodulator 156. .

The delay unit 142 delays the baseband signals of the I and Q channels output from the digital shaping filter 100 for a predetermined time. The predistortion updater 144 compares the signals of the corresponding I and Q channels of the delay unit 142 and the demodulation compensator 146 to generate data for compensating the values of the predistortion table. An address generator 140 generates an address of the predistortion table 138 from the I and Q channel baseband signals output from the digital shaping filter 100. The predistortion lookup table 138 accesses the predistortion data at the address position designated by the output of the address generator 140 and outputs the predistortion data to the mixers 102 and 104, respectively, and is output from the predistortion updating unit 144. Save the update information.

A first modulation envelope detector 124 detects an envelope of the modulation signal output from the modulator 116. The A / D converter 126 converts the envelope output from the first modulation envelope detector 124 into digital data. The serial to parallel converter 160 converts the output of the A / D converter 126 into parallel data and separately outputs the I and Q outputs. The modulation error generator 132 compares the modulation error signal with the output delayed by the delay 168 to time-synchronize with the I and Q outputs of the corresponding serial-to-parallel converter 160 and the outputs of the mixers 102 and 104, respectively. Occurs. A second modulation envelope detector 128 inputs the output of the attenuator 158 to detect the envelope of the last output modulation signal. The A / D converter 130 converts the envelope output from the second modulation envelope detector 128 into digital data. The serial / parallel converter 162 converts the output of the A / D converter 130 into parallel data and separately outputs the I and Q outputs. The demodulation error generator 134 outputs the output delayed by the delay unit 170 and the output of the demodulation compensator 146 to time-synchronize the I and Q outputs of the serial-to-parallel converter 162 and the output of the demodulation compensator 146, respectively. In comparison, a demodulation error signal is generated.

A compensation memory address generator 166 generates an address of the compensation memory from the baseband signals of the predistorted I and Q channels output from the mixers 102 and 104. The Quadrature Modulation compensation RAM 136 stores data for compensating for the modulation error. The modulation is adaptively changed by the output of the modulation error generator 132 and the output of the compensation address generator 166. Output to compensator 106. Quadrature Demodulation compensation RAM 164 stores data for compensating a demodulation error. The demodulation compensation memory 164 adaptively changes each parameter by the output of the demodulation error generator 134 and the output of the compensation address generator 166. Output to compensator 146.

Referring to FIG. 2, the digital shaping filter 100 performs a function of pulse shaping a digital signal of each of I and Q channels in a baseband, and an oversampled signal is basically input. In the case of the IS-95 CDMA system, the oversampling is quadrupled. The upsampled and pulse shaped signal by the digital shaping filter 100 is four times the input signal rate. Baseband signals of the I and Q channels output from the digital shaping filter 100 are applied to the multipliers 102 and 104, respectively, and multiplied with the predistortion data of the I and Q channels output from the predistortion table 138. The output of the digital shaping filter 100 is also applied to the address generator 140 and used to generate the addresses of the predistortion table 138.

In addition, the output of the digital shaping filter 100 is used to generate a reference signal for comparison with a signal fed back. In this case, in order to apply a predistortion algorithm to received data such as transmitted data, The point of comparison must match. To this end, an appropriate delay time is required, which serves to compensate for the delay generated at the transmitting and receiving end, which can be implemented by the delay unit 142. In the case of using a digital signal processor (DSP), the above functions can be implemented by an algorithm. Each I-channel and Q-channel signal output from the delay unit 142 is compared with the output of the demodulation compensator 146 in order to update the value of the predistortion table 138 to determine the value of the predistortion data 144 Is entered.

The operation of the modulation compensator 106 performing the function of correcting the gain error and the phase error of the modulator 116 is as follows. The output of the modulator 116 is a high frequency signal carrying a carrier, and since the amplitude or phase of the baseband signal cannot be directly restored therefrom, the first modulation envelope is used to detect only the components of the baseband signal from the modulated signal. Detector 124 is used. The first modulation envelope detector 124 includes a low pass filter. After detecting the original baseband signal from the modulated signal, it passes through the A / D converter 126 to convert it into a digital signal, and conversion to parallel data is necessary for comparison with the parallel data. This is done by the serial-to-parallel converter 160. The signal output from the serial-to-parallel converter 160 is compared with the baseband digital signal predistorted by the modulation error generator 132. In this case, the delay unit 168 is used to time-synchronize the two signals. The modulation error generator 132 generates a difference signal by comparing the predistorted I and Q channel signals with the envelope detected signal at the output of the modulator 116. The modulation error generator 132 includes a circuit for converting the input I-channel and Q-signal into a polar coordinate signal (Rectangular to Polar Coordinate). As a result, the modulation error generator 132 internally generates an error signal with magnitude and phase information and is input to the k, l input terminals of the modulation compensation memory 136.

Further, the predistorted I and Q signals, which are outputs of the multipliers 102 and 104, are applied to the compensation address generator 166 to generate an address of the modulation compensation memory 136. The principle of address generation of the compensation address generator 166 is determined by the magnitudes of the two predistorted signals and the sizes of the compensation memories 136 and 164, and the I addresses and the Q addresses, which are outputs of the compensation address generator 166, are modulated. It is input to the address terminals i, j of the compensation memory 136. The output signal of the modulation compensation memory 136 is QM_Gi (gain control signal of modulator I_Arm), QM_Pi (phase control signal of modulator I_Arm), QM_Gq (gain control signal of modulator Q_Arm), QM_Pq (phase control signal of modulator Q_Arm). The values of the control signals are changed every sample, which in turn adaptively controls the gain and phase of the I and Q terminals of the modulation compensator 106. The modulation compensator 106 functions to adaptively convert gains and phases of the input signals I and Q according to control signals input to the control terminals.

By adaptively converting the gain and phase of the input signals I and Q as described above, it is possible to compensate for gain and phase errors generated during modulation in the modulator 116, thereby preventing performance degradation of the system.

The gain error and phase error caused by the imperfection of demodulator 156 occurring in the demodulation stage can be described in a similar concept. That is, a part of the transmission signal output from the power amplifier 118 is coupled by the directional coupler 120, and attenuated by the attenuator 158. The signal attenuated by the attenuator 158 detects an envelope of the signal by the second modulation envelope detector 128 as used in the modulation stage. The A / D converter 130 passes through the A / D converter 130 to convert the baseband envelope signal detected by the second modulation envelope detector 128 into a digital signal, and is required to be converted to parallel data for comparison with the parallel data. Transducer 162 performs this conversion function. The signal output from the serial-to-parallel converter 162 is compared with the baseband digital signal demodulated by the demodulation error generator 134. The demodulation error generator 134 generates a difference signal by comparing the demodulated I and Q signals with a signal detected by an envelope at the front end of the demodulator 156 and then converted into parallel data. Use The demodulation error generator 134 includes a circuit for converting an I signal and a Q signal input to an input signal terminal into a polar coordinate signal (Rectangular to Polar Coordinate). As a result, the demodulation error generator 134 internally generates an error signal with magnitude and phase information and applies it to the m and n input terminals of the demodulation compensation memory 164. The I addresses and the Q addresses, which are outputs of the compensation address generator 166, are applied to the address terminals i, j of the demodulation compensation memory 164.

The output signals of the demodulation compensation memory 164 are QDM_Gi (gain control signal of demodulator I_Arm), QDM_Pi (phase control signal of demodulator I_Arm), QDM_Gq (gain control signal of demodulator Q_Arm), and QDM_Pq (phase control signal of demodulator Q_Arm). . The value of the control signals as described above changes every sample, which in turn adaptively controls the gain and phase of the I and Q terminals of the demodulation compensator 146.

The demodulation compensator 146 adaptively converts the gain and phase of the input signals I and Q according to a control signal input to the control terminal of the demodulation compensator 146. In this case, a gain error and a phase generated in the demodulator 156 are performed. The performance degradation of the system caused by the error can be prevented.

In the linearization system of the power amplifier of the transmitter by the adaptive predistortion method according to the embodiment of the present invention, such as QAM and QPSK, which are mainly used in mobile communication, the efficiency of the spectrum is large but the amplitude of the envelope of the modulated signal is large. It is possible to effectively reduce distortion in the output spectrum which is mainly caused by nonlinearity of the power amplifier at the transmitting end of the modulation system. In addition, unlike the linearization method considering only the non-linearity of the power amplifier, by including an algorithm for compensating the modulator gain error and phase error, the gain error and phase caused by the incompleteness of the modulator included in the transmitter and the receiver are included. There is an advantage that can effectively compensate for the error. Since all data processing is performed on the baseband digital data, there is an advantage in terms of noise effect and accuracy over the method using an analog system, and the algorithm can be implemented in software, so it is optimized to obtain the desired performance. There is an advantage to achieve this.

Claims (8)

In the power amplifier linearizer of the communication system, Means for generating a baseband signal, An address generator for generating an address corresponding to the magnitude of the baseband signal; A predistortion table for outputting predistortion data at a position corresponding to the address; A mixer for mixing the baseband signal and predistortion data; And a modulator for modulating the predistorted baseband signal to generate a transmission signal. A power amplifier configured to amplify and output the output of the modulator; A demodulator for feeding back the output of the power amplifier and demodulating the baseband signal; A delay unit for delaying the baseband signal; And a predistortion updater which compares the delayed baseband signal with the demodulated signal and generates updated predistortion data according to the difference, and stores the predistortion data in the predistortion table. In the power amplifier linearizer of the communication system, Means for generating a baseband signal, An address generator for generating an address corresponding to the magnitude of the baseband signal; A predistortion table for outputting predistortion data at a position corresponding to the address; A mixer for mixing the baseband signal and predistortion data; A modulation compensator for compensating for gain and phase errors of the input signal generated when the output of the mixer is input and modulated by the gain and phase control signals; A modulator for modulating an output of the modulation compensator to generate a transmission signal; A power amplifier configured to amplify and output the output of the modulator; A demodulator for feeding back the output of the power amplifier and demodulating the baseband signal; A delay unit for delaying the baseband signal; And a predistortion updater which compares the delayed baseband signal with the demodulated signal and generates updated predistortion data according to the difference, and stores the predistortion data in the predistortion table. 3. The apparatus of claim 2, wherein the means for generating the modulation gain and phase control signal, An envelope detector for detecting the envelope of the baseband signal at the output of the modulator; A modulation error generator for generating a modulation error signal by comparing the output of the envelope detector with the delayed output of the mixer; A compensation address generator for generating a compensation address from an output of the mixer, And a modulation compensation memory for accessing the gain and phase control data of the modulation compensator and outputting the modulated compensator to the modulation compensator by the outputs of the modulation error generator and the compensation address generator. In the power amplifier linearizer of the communication system, Means for generating a baseband signal, An address generator for generating an address corresponding to the magnitude of the baseband signal; A predistortion table for outputting predistortion data at a position corresponding to the address; A mixer for mixing the baseband signal and predistortion data; A modulation compensator for inputting an output of the mixer and compensating for gain and phase errors generated during modulation by a gain and phase control signal; A modulator for modulating an output of the modulation compensator to generate a transmission signal; A power amplifier configured to amplify and output the output of the modulator; A directional coupler for feeding back the output of the power amplifier; An attenuator for attenuating the output of the directional coupler; A demodulator for demodulating the output of the attenuator into a baseband signal; A demodulation compensator for compensating for gain and phase errors of the demodulator; A delay unit for delaying the baseband signal; And a predistortion updating unit for comparing the delayed baseband signal with the output of the demodulator and generating updated predistortion data according to the difference and storing the predistortion data in the predistortion table. The apparatus of claim 4, wherein the means for generating the modulation gain and phase control signal comprises: A first envelope detector for detecting an envelope of a baseband signal at an output of said modulator, A modulation error generator for generating a modulation error signal by comparing the output of the envelope detector with the delayed output of the mixer; A compensation address generator for generating a compensation address from an output of the mixer, And a modulation compensation memory for accessing the gain and phase control data of the modulation compensator and outputting the modulated compensator to the modulation compensator by the outputs of the modulation error generator and the compensation address generator. The apparatus according to claim 4 or 5, wherein the means for generating the demodulation gain and phase control signal, A second envelope detector for detecting an output envelope of the attenuator; A demodulation error generator for generating a demodulation error signal by comparing the delayed outputs of the demodulation compensator and the second envelope detector; And a demodulation compensation memory which accesses the gain and phase control data of the demodulator by the outputs of the demodulation error generator and the compensation address generator and outputs the demodulation compensator to the demodulation compensator. In the power amplifier linearization method of a communication system, Generating a baseband signal, Generating an address corresponding to the magnitude of the baseband signal; Generating predistortion data of a position corresponding to the address and mixing the predistortion data with the baseband signal; Modulating the predistorted baseband signal and amplifying the power to output a transmission signal; Demodulating the transmitted signal into a baseband signal; And comparing the delayed baseband signal with the demodulated signal, generating updated predistortion data according to the difference, and storing the updated predistortion data in the predistortion table. In the power amplifier linearization method of a communication system, Generating a baseband signal, Generating an address corresponding to the magnitude of the baseband signal; Generating predistortion data of a position corresponding to the address and mixing the predistortion data with the baseband signal; Outputting a transmission signal by amplifying the predistorted baseband signal by adaptively modulating and predicting a modulation error; Detecting an envelope of the transmission signal; Generating a modulation error signal by comparing the detected envelope with the mixed signal; Generating a compensation address according to the magnitude of the mixed signal and selecting an output of a modulation compensation memory together with the modulation error signal to generate the gain and phase control signals; Demodulating the transmitted signal into a baseband signal; And comparing the delayed baseband signal with the demodulated signal, generating updated predistortion data according to the difference, and storing the updated predistortion data in the predistortion table.

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