JPS58103068A - ベクトル・デ−タ乗算処理方式 - Google Patents
ベクトル・デ−タ乗算処理方式Info
- Publication number
- JPS58103068A JPS58103068A JP56201968A JP20196881A JPS58103068A JP S58103068 A JPS58103068 A JP S58103068A JP 56201968 A JP56201968 A JP 56201968A JP 20196881 A JP20196881 A JP 20196881A JP S58103068 A JPS58103068 A JP S58103068A
- Authority
- JP
- Japan
- Prior art keywords
- data
- multiplication
- circuit
- vector data
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Complex Calculations (AREA)
- Character Discrimination (AREA)
- Image Analysis (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56201968A JPS58103068A (ja) | 1981-12-15 | 1981-12-15 | ベクトル・デ−タ乗算処理方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56201968A JPS58103068A (ja) | 1981-12-15 | 1981-12-15 | ベクトル・デ−タ乗算処理方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58103068A true JPS58103068A (ja) | 1983-06-18 |
JPS6136678B2 JPS6136678B2 (enrdf_load_stackoverflow) | 1986-08-19 |
Family
ID=16449744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56201968A Granted JPS58103068A (ja) | 1981-12-15 | 1981-12-15 | ベクトル・デ−タ乗算処理方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58103068A (enrdf_load_stackoverflow) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0664694U (ja) * | 1993-02-24 | 1994-09-13 | 株式会社共栄商会 | パチンコ機用球受装置 |
-
1981
- 1981-12-15 JP JP56201968A patent/JPS58103068A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6136678B2 (enrdf_load_stackoverflow) | 1986-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4525796A (en) | Pipelined operation unit for vector data | |
CN112114776A (zh) | 一种量子乘法运算方法、装置、电子装置及存储介质 | |
EP0890899A2 (en) | Multiplication method and apparatus | |
JPH02504339A (ja) | ガロア体における乗算器‐加算器及びディジタル信号処理プロセッサにおけるその使用 | |
JP2004005645A (ja) | 確率に基づく推諭システム | |
KR960704266A (ko) | 고속 이진 승산기용 개량된 웰레스-트리 가산기, 구조 및 방법 | |
US7103620B2 (en) | Method and apparatus for verification of digital arithmetic circuits by means of an equivalence comparison | |
CN112491543A (zh) | 基于改进的蒙哥马利模幂电路的ic卡解密方法 | |
Kamal et al. | A generalized pipeline array | |
Qiu et al. | Arithmetic and logic operations for DNA computers | |
WO1991013400A1 (en) | Pseudo-random sequence generators | |
JPS58103068A (ja) | ベクトル・デ−タ乗算処理方式 | |
Simon | Division in idealized unit cost RAMs | |
Rahman et al. | An extensive karnaugh mapping tool for boolean expression simplification | |
US4325056A (en) | BCD To binary converter | |
JPS58129653A (ja) | 乗算方式 | |
Homma et al. | Evolutionary graph generation system with symbolic verification for arithmetic circuit design | |
Maurer | Scheduling blocks of hierarchical compiled simulation of combinational circuits | |
Tokuhara et al. | Acquisition of characteristic block preserving outerplanar graph patterns by genetic programming using label information | |
Hanan | D2-synchronization in nondeterministic automata | |
CN115879553B (zh) | 量子模数完整乘法运算方法、装置及模数算术组件 | |
SU1157542A1 (ru) | Устройство дл умножени | |
JP3921259B2 (ja) | 記号的処理を可能にする非記号処理装置と、情報処理システム及びその自動コーダ | |
Park et al. | A Vision Transformer Enhanced with Patch | |
SU1569826A1 (ru) | Устройство дл вычислени сумм произведений |