JPS5810258A - Configuration controller for computer system - Google Patents

Abstract

PURPOSE:To perform minute monitoring and re-configuration control, by performing self-diagnosis of a CPU and diagnosis between the CPUs with a multi- computer system and making system re-configuration when an accident occurred. CONSTITUTION:Four computers 1-4 of a computer system are constituted as mutual monitor. This role is performed with signal lines 12, 21, 13, 31, 14, 41, 24, 42, 23, 32, 34 and 43. Registers 101-104 storing a CPU status signal are located at the outside of each CPU. A configuration control section 5 fetches a CPU status signal stored in the registers 101-104 and makes re-configuration control and the processing for system re-configuration. The re-configuration control is made with a re-configuration control signal on signal lines 51-54.

Description

[Detailed Description of the Invention] The present invention is based on the CPU
), especially system reconfiguration when an abnormal phenomenon occurs within the system.
The present invention relates to a configuration control device that performs.

Central Processing Bag + J&J (CPU) The method of checking the Isohikai by the CPU is called self-diagnosis.This method of self-diagnosis is based on α's father, Dig Shin, From the days of a single CPU system consisting of only one CPU [J] as the core,
Various ideas have been proposed. For example, CPU
The method of executing the above Tani Rakuhin Imakura and checking whether the command is executed normally within the specified time is simply as follows.
There are methods to report this as an abnormality in the internal processing of the CPU, or as an output to the external system, such as a loss of kuyuan. C.P.
'U is 1'M ft, among the system components (machines), the only peripheral equipment that can maintain the system frame 1j by switching etc. due to abnormal configuration is the peripheral equipment when a number of bales are installed. C l) U failure will lead to complete loss of system functionality.

However, in a system where multiple system devices such as C1PU or similar files are required, naturally more system functions can be performed than in a system with one equivalent CI'U. Kotogyo”
I'm going to Noh. An example of an internal structure that has been conventionally used in such a system will be explained with reference to FIGS. 1 to 3.

In Figure 1, two C'1) Ul.

2 is peripheral 1 leakage device (hardware) 12 and input/output bus 1
It is shared and used via 1. Now, it is assumed that processing is performed in CPvJl, and processing B is performed in C]'iJ2, and processing is to be carried out before processing B. In this state, if the CPUI fails or stops, CI)U
Receives failure number 16 and 13 by two CPUs and begins reconfiguration.

This will be explained with reference to FIG.

Valley 1 in Figure 2] Tsuku 21, 22, 23.24 are left 1t
lU'r1min-1rE CP IJ 1 Contents, right 1
The Itls portion indicates the contents of the CPU2. Therefore, in block 21, C is shown where both CPU1 and CPU2 are normal, and in block 22, CPU1 is broken and processing A is shown.
The state after the reconfiguration is performed by the CPU 2 is shown.

Block 23 shows all the cases where the CPUI is caused to perform processing B after the CPUI failure has been resolved. block 24
shows an example in which CI) U2 is disconnected and CPU1 performs processing A. Thereafter, the process returns to block 21 by causing the separated CPU 2 to perform process B. 31
~34 shows the route.

FIG. 3 similarly shows another state when one side of CI) U was exposed to acid for one time. First, block 21 shows that both CPUs 1 and 2 are normal.

If CPU 2 becomes abnormal, processing B has a lower priority than processing A, so even if processing 1 stops, processing A and CP
Switching control is not necessary since it is continued through the UI. Then, CP TJ 2 is disconnected and stopped.

Next, how mutual monitoring is performed in a conventional multi-system A will be explained in the case of four CP[J units. Figure 4 shows an example of this, with 4 CPUs, 2,
3.4 is formed and arranged in a ring shape. 1 C11
U has one monitoring CPU as its target, and the four monitoring CPUs are mutually monitored in a ring. In the figure, signal 15 is a mutual monitoring response request signal, and signal 16 is a response signal. Each CP
As shown in flowchart 1 in Figure 5, U determines whether the CPU to be monitored is "alive" or "dead" (if it is already "dead", the following processing is unnecessary), and if it is "alive", then Response request signal 1
5 is issued 2, and the response signal 16 is received within the specified time from the monitored CI)
If there is no output from U, it is assumed that there is an abnormality in the monitored CI U, the monitored CPU is disconnected, and this is treated as a "dead" state. After this, the configuration of the remaining CPUs is reconfigured to a predefined mode.

With the conventional monitoring methods described above, only cases where the CPU becomes obviously abnormal (failure or stoppage, etc.) are detected, and therefore even in system reconfiguration based on this, fine-grained configuration control from the perspective of the entire system function is required. For example, as shown in Figure 4, it is impossible to do this.
In this system, CPU 1 performs processing A,...
B, is performed, and CP [J 2 processes A, , , B
, is to be carried out. Let us assume that in order for the whole to function as a system, one of AI, A, and one of B, , and B must be functioning. As mentioned above, in the monitoring and management of the entire CPU level, the subdivided processes (modules) as described above will only stop functioning in +41 due to internal abnormalities, etc.
It may also be possible if the configuration is not subject to configuration control. In this way, even if function AI and function 1 are stopped, CPU 1.2 will not be monitored at the level described above, and therefore OPU will not be monitored even though the entire OPU appears to be healthy. There is a possibility that system functions may stop working.

An object of the present invention is to provide a configuration control device for a computer system that performs fine-grained monitoring and reconfiguration control.

The gist of the present invention is that in addition to the self-diagnosis of the CPU, diagnosis between the CPUs is performed to perform system reconfiguration. Furthermore, as for the diagnosis content, diagnosis for each function mainly viewed from the software and system aspects, and diagnosis of peripheral equipment (hardware) added to the CPU, were previously used for system reconfiguration. The present invention will be described in full detail below.

FIG. 6 shows an embodiment of a reconfigurable @l device for a computer system consisting of four CPUs. 4 computers 1.2.3.
4 are configured in a mutual monitoring relationship. This role is for signal lines 12, 21.13° 31.14, 41, 24
, 42, 23, 32, 34°43 will be fulfilled. External to each CPU are registers 101 and 1 that store CPU status signals.
02,103°104 are provided. The configuration control unit 5 is
In this embodiment, there is no center metal 1, valley registers 101, 102,
The CPU status signals stored in 103 and 104 are processed for system reconfiguration, and reconfiguration control is performed based on the results. Reconfiguration control is via signal line 51°52.5
This is done by the reconfiguration control signal on 3.54.

Before explaining the overall operation, state detection and processing within each CPU will be described.

First, in order to grasp the status within each CPU, an internal diagnostic index Sij is introduced and defined as follows.

Internal diagnostic index parameter n4 is set to rB =, ;CIBkIT++ZβIJt1PIt...
...(l), the internal diagnostic index S11 is 114:2 When rh, Sr J = 1.0
= ” When f21rt>γII, S IJ=
0.0 = ·-j (defined as 41. Here, the j-th CPU direction of the SB i-th CPU is the internal state internal diagnostic index, γ 1; is the internal diagnostic index parameter, rhi is the upper limit parameter for state value conversion, γt is the lower limit parameter for state value conversion, T+ki is the 1st-CPU internal function failure index, (0.o at 1.0% operation port (unable to operate) ) P + z H 1st -
The first hardware failure index miT"+ under CPU management is weighted by a factor, and AJtIPtz is weighted by a factor (0≦αljk).

β Emperor Jz <1.0).

Equation (2) indicates a completely abnormal state, Equation (4) indicates a completely normal state, and Equation (3) indicates an intermediate case, that is, a partially abnormal state.

Based on the above definitions, the operation of FIG. 6 will be explained.

Status signals SB id:, signal lines 12, 21.14, 41°13. generated in each CPU of CPUI~4.
31, 23, 32, and 34, 43, 24, 42 to each other. However, 1-j is self-designated and is used for self-diagnosis. In addition to its own diagnostic index, each CPU obtains the diagnostic index of other CPUs by receiving the above-mentioned transmission signal. That is, CPU = Oiteha, (81>+ @St ! e st m...
g Sin) in the system (n-4 in the figure)
) can be formed. This status row vector is stored in registers 101 to 104 corresponding to each C'PU.
is sent to and temporarily stored. This register 101-104
The state vector (9) data within is sent to the configuration control unit 5. The direction and state row vector data is SI4, but in S11, there are cases where the SB is received from the CPU of another system and cases where it is not, so it is converted to the Vth voting signal as follows, This voting bias vIj is stored in the register 101N104.

This Vth voting signal is sent from each register 101 to 104 to the configuration i'61) (IilJ unit 5, and the configuration control unit 5 converts the voting signal from the matrix vIj by the voting signal from each CPU to the register 101 to 104'. Each CP according to the following formula
Determine the state of U.

3,0 ・Vt J+ΣVl, ≧3. OVb
``...'' (61 bird key j Here, Vb is a dead band. In other words, the CPU (number type) that satisfies equation (6) is judged to be down and is disconnected from the system, and the entire A control signal is sent out via the signal lines 51 to 54 in order to reconfigure the CI).The CI) U that received this control signal performs the necessary reconfiguration under the direction of the control signal.

(10) According to the examples in 1-1-1, (21) In addition to self-diagnosis, U is a song (,: P
Since the diagnosis of P U is one dimension, and all of them have constituent sounds that can be summarized in the P + composition suppressing part, a fine-grained inner composition 11i11 side j is possible. Direction. The image composition j side] part may be -drawing CP 11,
In history, one of the four CPUs may have the functions of 60+ IG Seikan (Foundation) Department. This CP at this time [J is the master CPU name -r Z). This 1 easy landing, valley CP [J's cold cold version 1 inno "ha, master boat 71! CI" IJ 1 was implemented first, and this was down 6L easy landing Q - Well, I decided to f. In the inheritance, Mask C
P [J all moves +! :Takama, B degree matrix V+1
This can be done by considering the U number as 1 and eliminating the columns (CI) down.

・4\)6 Clear / Lge, each t21) U's unfaithfulness j
Since corpse-like things are captured in the system system Reitai whole CI) U configuration, more detailed backup processing is possible.

[Brief explanation of the drawing]

Figure 1 is a conceptual diagram showing an example of the nostem structure of F.
11) Figures 2 and 3 show the state of the conventional C130 system at the time of reconfiguration.
A block diagram explaining Ariichi monitoring, Figure 5 is a flow chart? FIG. 1 and FIG. 6 are embodiments of system 1) component devices according to the present invention. 1 to 4... c PU, 5... configuration ft1lJ flange. Agent: Patent attorney Masami Akimoto (12) Figure 1, Figure 2, 3 Ia

Claims (1)

[Claims] ■ Multiple CPUs? 11- In a computer system in which each CPU shares or redundantly takes over the functions of the entire system, the self-failure diagnosis results of each CPU and the failure diagnosis results of other CPUs by each CPU are used. A computer system configuration open side 1 device that controls the computer system to perform system reconfiguration such as disconnecting each CPU from the system, sharing the system load, and disconnecting peripheral hardware units. 2. The above patent claim also states that the failure diagnosis result is a value formed from failure diagnosis results obtained for each function within the CPU and failure diagnosis results obtained for each input/output device under the control of the CPU. A configuration control device for a computer system according to item 1. 3. The computer according to claim 1, wherein each of the failure diagnosis results is taken into only a specified CPU among the plurality of CPUs, and the CPU controls the reconfiguration. System configuration itt control device.