JPS5810222A - Data transferring system - Google Patents

Abstract

PURPOSE:To realize the validity of transferred data comparatively simply, by transferring by placing prescribed data of an valid bus or its complementary data on an invalid bus at a transmitting side and by comparing received data of a prescribed or invalid data byte at a receiving side. CONSTITUTION:When data of n bytes (an integral number of n<N) is transferred, a transmitting side (a left end) transfers by placing data of prescribed data bytes or its complementary data in a valid data bus on an invalid data bus. A receiving side (a right end) compares received data of said prescribed data bytes with received data of said invalid data bytes and as a result of this, the validity of transferred data is checked per bit. By this way, a failure of a data bus line per bit is picked up. 4, 5 expressed by a figure denote a receiving data receiver and a buffer, respectively and 6 denotes a data comparing circuit, which are checked in bit unit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transfer method between two devices 1, and particularly to a method for checking transferred data.

Conventionally, in order to confirm the reliability of the data bus, one or more parity bits are added to the transferred data and sent to the receiving end, where the data bits and
The validity of the transferred data is determined by comparing it with the parity bit.

However, with this determination method, even 6 of the data bits
If there are 11 data errors, the data error cannot be detected, and even if a data error is detected due to the deafened parity bit, it is impossible to extract the bit.

On the other hand, even in data transfer systems where the size of the data bus is variable, all ']' or all '0' are sent to the invalid data byte bus, which is used to detect error bits. That never happened.

In other words, some types of magnetic tape equipment have a 16-bit data bus, but it is used for 16 bits and 8 bits depending on the mode, and in the 8-bit mode, the remaining 8 bits are treated as invalid. The object of the present invention is to implement a method of recommending IF validity +1+-SharkW1 of transferred data in addition to checking parity during data transfer.

In the present invention, the inter-device data bus has a number of bytes N (N is an integer of 2 or more), and the number of valid bytes in the N-byte data bus can be specified by a control signal from one device. In the data transfer device θ, when performing data transfer of 1 bytes (an integer of n<H), the sending side inputs data of a predetermined data byte of the valid data byte bus or its complementary data to the invalid data byte bus. On the receiving side, the validity of the transferred data can be checked bit by bit by comparing the received data of the predetermined data byte with the received data of the invalid data byte. This is what I did.

Referring to FIG. 1, the left end is the sending end, which consists of a valid byte data buffer and interface driver 1, and a data buffer with the same or complementary code as predetermined valid byte data and an interface driver 2,
There are N bytes in total, and valid byte data is displayed in n interface path line 3, which is an integer smaller than N. The right end is a receiving end, 4 and 5 are a receiving data receiver and a buffer, respectively, and 6 is a data comparator circuit (CMP) that can check bit by bit.

BC In the present invention, a dedicated control line may be used as the control line to indicate the effective number of bytes in the N-byte data bus. Kl may be configured to display whether it is valid (royal bit or upper bit). In this case, the dedicated control line becomes unreliable.

11 = As described above, according to the present invention, the validity of transferred data can be checked bit by bit, which is effective in preventing failures in data checks due to parity bits, as well as preventing data bus line failures in bit units. 4. A single explanatory drawing between Figure and i'fnO is (2) Wl which shows a data transfer system according to the present invention in a block diagram.

3- In the figure, L is a valid height data buffer and an interface driver, 2 is a data buffer with the same or complementary sign as the valid byte data, 1 and an interface driver 13 are in and face path lines, 4 and 5 are 91
= data receiver and buffer; 6 indicates a data comparison circuit;

4-

Claims (1)

[Claims] At least, in a data transfer system consisting of a data bus consisting of N bytes (N is an integer of 2 or more) and, if necessary, the number of valid bytes in the BN byte data bus (i111 line, n bytes) When performing a data transfer (n<N integer), the sending side transfers the specified data byte data of the valid data byte bus or its complementary data on the invalid data byte bus, and the receiving side , a data transfer method characterized in that the received data of the predetermined data byte and the received data of the invalid data byte are compared.