JPS58101211U - automobile speed control device - Google Patents

automobile speed control device

Info

Publication number
JPS58101211U
JPS58101211U JP19868681U JP19868681U JPS58101211U JP S58101211 U JPS58101211 U JP S58101211U JP 19868681 U JP19868681 U JP 19868681U JP 19868681 U JP19868681 U JP 19868681U JP S58101211 U JPS58101211 U JP S58101211U
Authority
JP
Japan
Prior art keywords
vehicle speed
memory
pulse
rest period
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19868681U
Other languages
Japanese (ja)
Other versions
JPH02340Y2 (en
Inventor
光有 谷川
舛田 次郎
Original Assignee
富士通テン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通テン株式会社 filed Critical 富士通テン株式会社
Priority to JP19868681U priority Critical patent/JPS58101211U/en
Publication of JPS58101211U publication Critical patent/JPS58101211U/en
Application granted granted Critical
Publication of JPH02340Y2 publication Critical patent/JPH02340Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Controls For Constant Speed Travelling (AREA)
  • Control Of Vehicle Engines Or Engines For Specific Uses (AREA)
  • Control Of Velocity Or Acceleration (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例のブロック図、第2図は可変
抵抗器35の具体的な構成を示す電気回路図、第3図は
可変抵抗器35からの出力と設定車速との関係を示すグ
ラフ、第4図は可変抵抗器35の他の実施例の構成を示
す電気回路図、第5図はアナログ/デジタル変換器36
の具体的な電気回路図、第6図はアナログ/デジタル変
換器36によるプリセットされるべぎ設定車速を読込む
ための動作を説明するための波形図、第6A図はアナロ
グデジタル変換器36からの出力の計数誤差を生じる場
合を説明するための波形図、第7図はアナログ/デジタ
ル変換器36からの出力を読る取るための動作を示すフ
ローチャート、第8図は車速検出手段16からマイクロ
コンピュータ15の割込み入力端子iRQに入力される
信号の波′形図、第9図は車速検出手段16からの信号
を受信することによってマイクロコンピュータ15が 
   −行なう割込み動作を説明するためのフローチャ
ート、第10図は本考案の動作を説明するための波形図
、第11図は車速検出手段16から導出されるパルスと
実車速との関係を示し、かつアナログ/デジタル変換器
36から導出される信号の特−性を示すグラフである。 1・・・スロットル弁、’2・・・リンク機構、3・・
・アクセルペダル、4・・・アクチュエータ、7.8・
・・電磁弁、15・・・マイクロコンピュータ、16・
・・車速検出手段、21・・・セットスイッチ、22・
・・リジュームスイッチ、23・・・メモリ、24・・
・パーキンゲスインチ、25・・・ブレーキスイッチ、
30.33・・・時定数回数、34・・・プリセットス
イッチ、35゜45・・・可変抵抗器、36・・・アナ
ログ/デジタル変換器、65. 70−・・カウンタ1
23・・・クララチスインチ。 第3図 第4図     35 7 °う 第5図 甲 1 Y″−“四−゛−1甲 第6図        」 +印几月丁「■上
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is an electric circuit diagram showing the specific configuration of the variable resistor 35, and Fig. 3 is the relationship between the output from the variable resistor 35 and the set vehicle speed. 4 is an electric circuit diagram showing the configuration of another embodiment of the variable resistor 35, and FIG. 5 is an analog/digital converter 36.
6 is a waveform diagram for explaining the operation of reading the preset vehicle speed by the analog/digital converter 36, and FIG. 6A is the output from the analog/digital converter 36. 7 is a flowchart showing the operation for reading the output from the analog/digital converter 36, and FIG. 8 is a waveform diagram to explain the case where a counting error occurs. FIG. FIG. 9 is a waveform diagram of the signal input to the interrupt input terminal iRQ of the microcomputer 15 by receiving the signal from the vehicle speed detection means 16.
- a flowchart for explaining the interrupt operation to be performed; FIG. 10 is a waveform diagram for explaining the operation of the present invention; FIG. 11 shows the relationship between the pulses derived from the vehicle speed detection means 16 and the actual vehicle speed; 3 is a graph showing the characteristics of a signal derived from an analog/digital converter 36; 1... Throttle valve, '2... Link mechanism, 3...
・Accelerator pedal, 4...actuator, 7.8・
...Solenoid valve, 15...Microcomputer, 16.
...Vehicle speed detection means, 21...Set switch, 22.
...Resume switch, 23...Memory, 24...
・Parking gauge, 25...brake switch,
30.33...Time constant number of times, 34...Preset switch, 35°45...Variable resistor, 36...Analog/digital converter, 65. 70--Counter 1
23...Claratis Inch. Figure 3 Figure 4 35 7° Figure 5 A1 Y"-"4-゛-1 A Figure 6"

Claims (1)

【実用新案登録請求の範囲】 一  実車蓮に比例した周波数を有する信号を導出する
車速検出手段と、 設定車速に対応したパルス幅またはパルス休止期間を有
する信号を発生する車速設定手段と、スロットル弁を駆
動して開度を変化する駆動手段と、 メモリを有し、実車速がメモリにストアされている車速
となるようにデユーティを演算し、その得られたデユー
ティで前記駆動手段を制御するマイクロコンピュータと
を含み、 車速設定手段が導出する信号の設定車速に対応したパル
ス幅またはパルス休止期間は、マイクロコンピュータが
デユーティ演算をしていない時間よりも充分に小さい値
に選ばれており、マイクロコンピュータはこの車速設定
手段のパルス幅またはパルス休止期間に1を超える予め
定める倍数を掛算し、その槓を設定車速としてメモリに
ストアするようにしたことを特徴とする自動車の速度制
御装置。
[Scope of Claim for Utility Model Registration] (1) Vehicle speed detection means for deriving a signal having a frequency proportional to the frequency of an actual vehicle, vehicle speed setting means for generating a signal having a pulse width or pulse rest period corresponding to the set vehicle speed, and a throttle valve. a driving means that changes the opening degree by driving the vehicle; and a microcontroller that has a memory and calculates a duty so that the actual vehicle speed becomes the vehicle speed stored in the memory, and controls the driving means with the obtained duty. The pulse width or pulse rest period corresponding to the set vehicle speed of the signal derived by the vehicle speed setting means is selected to be a value sufficiently smaller than the time during which the microcomputer is not performing duty calculation, and the microcomputer A speed control device for an automobile, characterized in that the pulse width or pulse rest period of the vehicle speed setting means is multiplied by a predetermined multiple exceeding 1, and the resulting value is stored in a memory as a set vehicle speed.
JP19868681U 1981-12-28 1981-12-28 automobile speed control device Granted JPS58101211U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19868681U JPS58101211U (en) 1981-12-28 1981-12-28 automobile speed control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19868681U JPS58101211U (en) 1981-12-28 1981-12-28 automobile speed control device

Publications (2)

Publication Number Publication Date
JPS58101211U true JPS58101211U (en) 1983-07-09
JPH02340Y2 JPH02340Y2 (en) 1990-01-08

Family

ID=30111856

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19868681U Granted JPS58101211U (en) 1981-12-28 1981-12-28 automobile speed control device

Country Status (1)

Country Link
JP (1) JPS58101211U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667417A (en) * 1979-11-07 1981-06-06 Hitachi Ltd Car speed control unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667417A (en) * 1979-11-07 1981-06-06 Hitachi Ltd Car speed control unit

Also Published As

Publication number Publication date
JPH02340Y2 (en) 1990-01-08

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