JPS5783984A - Character broadcast receiver - Google Patents
Character broadcast receiverInfo
- Publication number
- JPS5783984A JPS5783984A JP55159498A JP15949880A JPS5783984A JP S5783984 A JPS5783984 A JP S5783984A JP 55159498 A JP55159498 A JP 55159498A JP 15949880 A JP15949880 A JP 15949880A JP S5783984 A JPS5783984 A JP S5783984A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- code
- memory
- character pattern
- pattern information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
PURPOSE:To improve the efficiency of utilization of a memory by comparing a desired specific code, obtained by retrieving and specifying received character pattern information, with an extracted specific code and by performing display operation by storing it in the memory when the both coincide with each other. CONSTITUTION:A service discrimination code signal, a program code signal, and a page code among transmitted pieces of character pattern information are extracted and supplied to a shift register 40, and a correcting circuit 41, etc., makes a one-bit correction. An operator, on the other hand, stores and holds program and page information, etc., specified by a program specifying circuit 21, in a latch circuit 44, etc. Those two groups of code signals are compared mutually by a circuit 47, etd., and, when they are all coincident, inputted to an AND circuit 51. Then, a buffer memory 30 is an RAM wherein information superposed in a horizontal scanning period is replaced and, when all codes are coincident, sends a high-leve signal to a recording control circuit 32 to hold the stored character pattern information, performing display on a CRT. Thus, a small-scale, efficient memory is used.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55159498A JPS5783984A (en) | 1980-11-14 | 1980-11-14 | Character broadcast receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55159498A JPS5783984A (en) | 1980-11-14 | 1980-11-14 | Character broadcast receiver |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5783984A true JPS5783984A (en) | 1982-05-26 |
Family
ID=15695076
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55159498A Pending JPS5783984A (en) | 1980-11-14 | 1980-11-14 | Character broadcast receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5783984A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6091823A (en) * | 1992-08-06 | 2000-07-18 | Fujitsu Limited | Transaction processing system utilizing teletext broadcasting system and terminal used in the transaction processing systems |
-
1980
- 1980-11-14 JP JP55159498A patent/JPS5783984A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6091823A (en) * | 1992-08-06 | 2000-07-18 | Fujitsu Limited | Transaction processing system utilizing teletext broadcasting system and terminal used in the transaction processing systems |
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