JPS577657A - Data communication device - Google Patents

Data communication device

Info

Publication number
JPS577657A
JPS577657A JP8261680A JP8261680A JPS577657A JP S577657 A JPS577657 A JP S577657A JP 8261680 A JP8261680 A JP 8261680A JP 8261680 A JP8261680 A JP 8261680A JP S577657 A JPS577657 A JP S577657A
Authority
JP
Japan
Prior art keywords
circuit
control circuit
data
words
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8261680A
Other languages
Japanese (ja)
Inventor
Katsuhiko Miyagawa
Toru Yokoe
Kazutoyo Hirozawa
Yoshiaki Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8261680A priority Critical patent/JPS577657A/en
Publication of JPS577657A publication Critical patent/JPS577657A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L13/00—Details of the apparatus or circuits covered by groups H04L15/00 or H04L17/00
    • H04L13/02—Details not particular to receiver or transmitter
    • H04L13/08—Intermediate storage means

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Bidirectional Digital Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To receive a variable-length data statement efficiently by permitting a control circuit to eliminate the need to monitor a received signal while receiving data, by providing a calculating circuit for the number of words and a delay circuit. CONSTITUTION:A received bis-serial signal (a) is converted by series-parallel converting circuit 10 into byte-serial data, which is stored in a buffer memory BM11. A control circuit 12, two bytes, for example, after a store signal (b) goes to an ''H'', opens receiving gates 13 and 14, and the data in the BM11 are inputted to a control circuit 12 and a calculating circuit 15 for the number of words. The calculating circuit 15 calculates the number of words of the remaining data and then sends a calculated value to the control circuit 12. On the basis of the value, the control circuit 12 starts a delay circuit 16 and carriers out its original operation during the period. The control circuit 12 opens receiving signal 13 and 14 again with a timer end signal (f) from the delay circuit 16, and fetches and processes data as many as the number of words calculated by the calculating circuit 15.
JP8261680A 1980-06-17 1980-06-17 Data communication device Pending JPS577657A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8261680A JPS577657A (en) 1980-06-17 1980-06-17 Data communication device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8261680A JPS577657A (en) 1980-06-17 1980-06-17 Data communication device

Publications (1)

Publication Number Publication Date
JPS577657A true JPS577657A (en) 1982-01-14

Family

ID=13779393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8261680A Pending JPS577657A (en) 1980-06-17 1980-06-17 Data communication device

Country Status (1)

Country Link
JP (1) JPS577657A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59221623A (en) * 1983-05-31 1984-12-13 Yotaro Hatamura Load transducer
US4674339A (en) * 1984-08-30 1987-06-23 Yotaro Hatamura Multi-axis load sensor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59221623A (en) * 1983-05-31 1984-12-13 Yotaro Hatamura Load transducer
US4674339A (en) * 1984-08-30 1987-06-23 Yotaro Hatamura Multi-axis load sensor

Similar Documents

Publication Publication Date Title
JPS5717049A (en) Direct memory access controlling circuit and data processing system
JPS5424532A (en) Reception unit for still picture signal
JPS5418247A (en) Data buffering device
JPS577657A (en) Data communication device
JPS54904A (en) Line selection system
JPS53118325A (en) Control system for input/output device
JPS53128214A (en) Encoding transmission device for facsimile signal
JPS6424522A (en) Transmission system for control signal
JPS54531A (en) Channel control system
JPS53136450A (en) Variable-length coding system
JPS5357772A (en) Thyristor
JPS547248A (en) Signal process system
JPS56146344A (en) Terminal control device
JPS5214321A (en) Reference order decision circuit
SU144522A1 (en) Method for decrypting CT-35 code, code No. 2 or another fixed-digit code
JPS56161725A (en) Logical package
JPS5644234A (en) Pcm coding system
JPS56145422A (en) Terminal device
JPS57178447A (en) Loop data transmission system
JPS5697125A (en) Transmission control system for terminal controller
JPS5399732A (en) Memory constituting method
JPS5422135A (en) Command chanin process system
JPS5434261A (en) Telemeter monitoring system
JPS5427756A (en) Discriminative switching system of troubled register
JPS5244123A (en) Fixed memory circuit