JPS577657A - Data communication device - Google Patents
Data communication deviceInfo
- Publication number
- JPS577657A JPS577657A JP8261680A JP8261680A JPS577657A JP S577657 A JPS577657 A JP S577657A JP 8261680 A JP8261680 A JP 8261680A JP 8261680 A JP8261680 A JP 8261680A JP S577657 A JPS577657 A JP S577657A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- control circuit
- data
- words
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L13/00—Details of the apparatus or circuits covered by groups H04L15/00 or H04L17/00
- H04L13/02—Details not particular to receiver or transmitter
- H04L13/08—Intermediate storage means
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Bidirectional Digital Transmission (AREA)
- Communication Control (AREA)
Abstract
PURPOSE:To receive a variable-length data statement efficiently by permitting a control circuit to eliminate the need to monitor a received signal while receiving data, by providing a calculating circuit for the number of words and a delay circuit. CONSTITUTION:A received bis-serial signal (a) is converted by series-parallel converting circuit 10 into byte-serial data, which is stored in a buffer memory BM11. A control circuit 12, two bytes, for example, after a store signal (b) goes to an ''H'', opens receiving gates 13 and 14, and the data in the BM11 are inputted to a control circuit 12 and a calculating circuit 15 for the number of words. The calculating circuit 15 calculates the number of words of the remaining data and then sends a calculated value to the control circuit 12. On the basis of the value, the control circuit 12 starts a delay circuit 16 and carriers out its original operation during the period. The control circuit 12 opens receiving signal 13 and 14 again with a timer end signal (f) from the delay circuit 16, and fetches and processes data as many as the number of words calculated by the calculating circuit 15.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8261680A JPS577657A (en) | 1980-06-17 | 1980-06-17 | Data communication device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8261680A JPS577657A (en) | 1980-06-17 | 1980-06-17 | Data communication device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS577657A true JPS577657A (en) | 1982-01-14 |
Family
ID=13779393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8261680A Pending JPS577657A (en) | 1980-06-17 | 1980-06-17 | Data communication device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS577657A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59221623A (en) * | 1983-05-31 | 1984-12-13 | Yotaro Hatamura | Load transducer |
| US4674339A (en) * | 1984-08-30 | 1987-06-23 | Yotaro Hatamura | Multi-axis load sensor |
-
1980
- 1980-06-17 JP JP8261680A patent/JPS577657A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59221623A (en) * | 1983-05-31 | 1984-12-13 | Yotaro Hatamura | Load transducer |
| US4674339A (en) * | 1984-08-30 | 1987-06-23 | Yotaro Hatamura | Multi-axis load sensor |
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