JPS5772093A - System and apparatus for automatically memorizing data program and the like, data and time - Google Patents
System and apparatus for automatically memorizing data program and the like, data and timeInfo
- Publication number
- JPS5772093A JPS5772093A JP55083443A JP8344380A JPS5772093A JP S5772093 A JPS5772093 A JP S5772093A JP 55083443 A JP55083443 A JP 55083443A JP 8344380 A JP8344380 A JP 8344380A JP S5772093 A JPS5772093 A JP S5772093A
- Authority
- JP
- Japan
- Prior art keywords
- data
- time
- memory
- clock circuit
- program
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G99/00—Subject matter not provided for in other groups of this subclass
- G04G99/006—Electronic time-pieces using a microcomputer, e.g. for multi-function clocks
Abstract
PURPOSE:To make it possible to store and output accurate data and time automatically at the time of input to a memory, by adding a clock circuit and a clock circuit maintaining power source to a device or the memory. CONSTITUTION:The data program and the like are inputted to an input device 1 and stored in the memory unit 3 by a CPU2 and a memory reading, writing, and erasing device 6. At this time, the signal from the clock circuit 5 which can be or cannot be turned ON and OFF by the program and a clock circuit maintaining power source 4 such as a battery is held by a latch circuit 9. Parallel to series conversion of the signal is performed in a shift register 10. The data and time immediately before or after the writing to the memory unit 3 are written in by the device 6. When the output is taken out of the memory by an output device 7, the written data and time in the memory 3 are outputted or the data and time at read out are simultaneously outputted from the circuits 4 and 5 by the control signal of the CPU2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55083443A JPS5772093A (en) | 1980-06-21 | 1980-06-21 | System and apparatus for automatically memorizing data program and the like, data and time |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55083443A JPS5772093A (en) | 1980-06-21 | 1980-06-21 | System and apparatus for automatically memorizing data program and the like, data and time |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5772093A true JPS5772093A (en) | 1982-05-06 |
Family
ID=13802567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55083443A Pending JPS5772093A (en) | 1980-06-21 | 1980-06-21 | System and apparatus for automatically memorizing data program and the like, data and time |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5772093A (en) |
-
1980
- 1980-06-21 JP JP55083443A patent/JPS5772093A/en active Pending
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