JPS5768909A - Differential amplifier - Google Patents

Differential amplifier

Info

Publication number
JPS5768909A
JPS5768909A JP14544880A JP14544880A JPS5768909A JP S5768909 A JPS5768909 A JP S5768909A JP 14544880 A JP14544880 A JP 14544880A JP 14544880 A JP14544880 A JP 14544880A JP S5768909 A JPS5768909 A JP S5768909A
Authority
JP
Japan
Prior art keywords
signal
differential amplifier
input
bias voltage
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14544880A
Other languages
Japanese (ja)
Inventor
Tadao Ogawa
Takemi Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14544880A priority Critical patent/JPS5768909A/en
Publication of JPS5768909A publication Critical patent/JPS5768909A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To keep constant the output impedance of a differential amplifier the output of which is in transformer coupling, by detecting the presence of an input signal and clamping the reference bias voltage to the same potential as the bias voltage at the input terminal. CONSTITUTION:The presence of an input signal is detected, by comparing a voltage Vp detected at a peak detection circuit 7 with a reference voltage Vc of a comparator 8. At signal input, a reference bias voltage is taken as VR1, and it is compulsively clamped with a reference bias voltage VR2 as equipotential, i.e. input bias, at no signal. Thus, DC superimposing state on a transformer connected to the output of the differential amplifier at no-signal can be prevented. Then, the output impedance of the differential amplifier can be kept constant independently of the presence or absence of the input signal.
JP14544880A 1980-10-17 1980-10-17 Differential amplifier Pending JPS5768909A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14544880A JPS5768909A (en) 1980-10-17 1980-10-17 Differential amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14544880A JPS5768909A (en) 1980-10-17 1980-10-17 Differential amplifier

Publications (1)

Publication Number Publication Date
JPS5768909A true JPS5768909A (en) 1982-04-27

Family

ID=15385451

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14544880A Pending JPS5768909A (en) 1980-10-17 1980-10-17 Differential amplifier

Country Status (1)

Country Link
JP (1) JPS5768909A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01151826A (en) * 1987-08-07 1989-06-14 Burr Brown Corp Sub-range analog-digital converter with multplex input amplifier separating circuit between reduction junction point and lsb encoder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01151826A (en) * 1987-08-07 1989-06-14 Burr Brown Corp Sub-range analog-digital converter with multplex input amplifier separating circuit between reduction junction point and lsb encoder

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