JPS5766581A - Data transfer system of computer - Google Patents
Data transfer system of computerInfo
- Publication number
- JPS5766581A JPS5766581A JP14274580A JP14274580A JPS5766581A JP S5766581 A JPS5766581 A JP S5766581A JP 14274580 A JP14274580 A JP 14274580A JP 14274580 A JP14274580 A JP 14274580A JP S5766581 A JPS5766581 A JP S5766581A
- Authority
- JP
- Japan
- Prior art keywords
- interruption
- horizontal lines
- signal
- intervals
- data transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4825—Interrupt from clock, e.g. time of day
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Abstract
PURPOSE:To perform interruption and data transfer processing with relatively simple constitution by generating an ineterruption signal provided with a pulse break period, and by transferring data during the break period. CONSTITUTION:When a horizontal synchronizing signal is applied, an interruption signal generator 7 which generates a double-speed synchronizing signal generates 16 pulses having intervals of 15 horizontal lines in one field and an interruption signal f1 provided with a break period having intervals of 38 horizontal lines and 37 horizontal lines in an odd-numbered and an even-numbered field eight before a vertical synchronizing signal. During the periods of 37 and 38 horizontal lines, data is transferred between a microcomputer 1 for mechanics control and a microcom- puter 2 for fetching key inputs. On the other hand, while a timer counter 9 counts the interruption pulses having the intervals of 15 horizontal lines, the shift clock generator 13 of the computer 2 is made ineffective through a transfer request generator 10 to perform interruption processing as to whether a kick pulse is generated or not. Therefore, the relatively simple constitution performs interruption and data transfer processing securely.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14274580A JPS5766581A (en) | 1980-10-13 | 1980-10-13 | Data transfer system of computer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14274580A JPS5766581A (en) | 1980-10-13 | 1980-10-13 | Data transfer system of computer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5766581A true JPS5766581A (en) | 1982-04-22 |
JPS6339999B2 JPS6339999B2 (en) | 1988-08-09 |
Family
ID=15322583
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14274580A Granted JPS5766581A (en) | 1980-10-13 | 1980-10-13 | Data transfer system of computer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5766581A (en) |
-
1980
- 1980-10-13 JP JP14274580A patent/JPS5766581A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6339999B2 (en) | 1988-08-09 |
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