JPS576492A - Sense amplifier circuit of memory - Google Patents

Sense amplifier circuit of memory

Info

Publication number
JPS576492A
JPS576492A JP7934980A JP7934980A JPS576492A JP S576492 A JPS576492 A JP S576492A JP 7934980 A JP7934980 A JP 7934980A JP 7934980 A JP7934980 A JP 7934980A JP S576492 A JPS576492 A JP S576492A
Authority
JP
Japan
Prior art keywords
gate length
gain constant
phis1
decreasing
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7934980A
Other languages
Japanese (ja)
Inventor
Masao Taguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7934980A priority Critical patent/JPS576492A/en
Publication of JPS576492A publication Critical patent/JPS576492A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To improve a detecting sensitivity without decreasing an operation speed, by executing a pre-sense operation by an FF using a transistor which is small in a gain constant and long in a gate length, and operating an FF using a transistor which is large in a gain constant and short in a gate length, after a prescribed time has elapsed. CONSTITUTION:A clock phip is made H, TRs Q18, Q19 are conducted, BL, BL bar, and Q12, Q13, Q15, Q16 are pre-charged, and a micropotential variation corresponding to stored information is generated in bit lines BL, BL bar. Subsequently, a sense operation is started, and TR Q14 is conducted by a signal phis1. A gain constant of Q14 is sufficiently set smaller, comparing with that of TR Q17. Also, the gate length of Q12 and Q13 is made longer than that of Q15 and Q16. FF1 executes a pre- sense operation, and subsequently, for instance, after 10ns, the FF1 is operated by a signal phis2. In case when a rise time of phis1 is 20ns, the FF2 operates before the FF1 finishes its amplifying operation, therefore, the detecting sensitivity is improved without decreasing the operation speed.
JP7934980A 1980-06-12 1980-06-12 Sense amplifier circuit of memory Pending JPS576492A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7934980A JPS576492A (en) 1980-06-12 1980-06-12 Sense amplifier circuit of memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7934980A JPS576492A (en) 1980-06-12 1980-06-12 Sense amplifier circuit of memory

Publications (1)

Publication Number Publication Date
JPS576492A true JPS576492A (en) 1982-01-13

Family

ID=13687417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7934980A Pending JPS576492A (en) 1980-06-12 1980-06-12 Sense amplifier circuit of memory

Country Status (1)

Country Link
JP (1) JPS576492A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60136993A (en) * 1983-11-23 1985-07-20 モトロ−ラ・インコ−ポレ−テツド Sense amplifier
JPH0192992A (en) * 1987-10-02 1989-04-12 Matsushita Electric Ind Co Ltd Sense amplifier circuit
JP2005293759A (en) * 2004-04-02 2005-10-20 Hitachi Ltd Semiconductor memory apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60136993A (en) * 1983-11-23 1985-07-20 モトロ−ラ・インコ−ポレ−テツド Sense amplifier
JPH0192992A (en) * 1987-10-02 1989-04-12 Matsushita Electric Ind Co Ltd Sense amplifier circuit
USRE38647E1 (en) 1987-10-02 2004-11-09 Matsushita Electric Industrial Co., Ltd. Sense amplifier circuit
JP2005293759A (en) * 2004-04-02 2005-10-20 Hitachi Ltd Semiconductor memory apparatus
US7843751B2 (en) 2004-04-02 2010-11-30 Hitachi, Ltd Semiconductor memory device comprising sense amplifier having P-type sense amplifier and N-type sense amplifiers with different threshold voltages
US8199596B2 (en) 2004-04-02 2012-06-12 Hitachi, Ltd. Semiconductor memory device having a plurality of sense amplifier circuits

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