JPS5760661B2 - - Google Patents
Info
- Publication number
- JPS5760661B2 JPS5760661B2 JP53050747A JP5074778A JPS5760661B2 JP S5760661 B2 JPS5760661 B2 JP S5760661B2 JP 53050747 A JP53050747 A JP 53050747A JP 5074778 A JP5074778 A JP 5074778A JP S5760661 B2 JPS5760661 B2 JP S5760661B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/722—Modular multiplication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
- G06F7/727—Modulo N arithmetic, with N being either (2**n)-1,2**n or (2**n)+1, e.g. mod 3, mod 4 or mod 5
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/03—Digital function generators working, at least partly, by table look-up
- G06F1/0307—Logarithmic or exponential functions
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5074778A JPS54144148A (en) | 1978-05-01 | 1978-05-01 | Exponential conversion type high speed multiplying system |
US06/178,676 US4366549A (en) | 1978-05-01 | 1980-08-15 | Multiplier with index transforms modulo a prime or modulo a fermat prime and the fermat prime less one |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5074778A JPS54144148A (en) | 1978-05-01 | 1978-05-01 | Exponential conversion type high speed multiplying system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54144148A JPS54144148A (en) | 1979-11-10 |
JPS5760661B2 true JPS5760661B2 (ja) | 1982-12-21 |
Family
ID=12867420
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5074778A Granted JPS54144148A (en) | 1978-05-01 | 1978-05-01 | Exponential conversion type high speed multiplying system |
Country Status (2)
Country | Link |
---|---|
US (1) | US4366549A (ja) |
JP (1) | JPS54144148A (ja) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4506340A (en) * | 1983-04-04 | 1985-03-19 | Honeywell Information Systems Inc. | Method and apparatus for producing the residue of the product of two residues |
US4555768A (en) * | 1983-06-07 | 1985-11-26 | Rca Corporation | Digital signal processing system employing logarithms to multiply and divide |
EP0169908B1 (en) * | 1984-01-21 | 1993-12-01 | Sony Corporation | Method and circuit for decoding error coded data |
US5214599A (en) * | 1986-12-19 | 1993-05-25 | Magerman David M | Advanced dimensional processing with division |
CA2008774C (en) * | 1989-01-30 | 1999-10-05 | Hikaru Morita | Modular multiplication method and the system for processing data |
US5144574A (en) * | 1989-01-30 | 1992-09-01 | Nippon Telegraph And Telephone Corporation | Modular multiplication method and the system for processing data |
JPH0833815B2 (ja) * | 1990-05-14 | 1996-03-29 | 日本電気株式会社 | 高桁乗算装置 |
ATE168481T1 (de) * | 1992-02-29 | 1998-08-15 | Bernd Hoefflinger | Schaltungsanordnung zum digitalen multiplizieren von integer-zahlen |
DE69434422T2 (de) * | 1993-11-30 | 2006-04-20 | Canon K.K. | Verfahren und Anordnung zur Verschlüsselung/Entschlüsselung auf der Basis des Montgomery-Verfahrens unter Verwendung von effizienter modularer Multiplikation |
US6826290B1 (en) * | 1999-10-20 | 2004-11-30 | Canon Kabushiki Kaisha | Image processing apparatus and method and storage medium |
JP3532860B2 (ja) * | 2001-01-22 | 2004-05-31 | 株式会社東芝 | 剰余系表現を利用した演算装置及び方法及びプログラム |
JP4774509B2 (ja) * | 2005-05-13 | 2011-09-14 | 国立大学法人お茶の水女子大学 | 擬似乱数発生システム |
US8060550B2 (en) * | 2005-09-27 | 2011-11-15 | Southern Methodist University | Method and apparatus for integer transformation using a discrete logarithm and modular factorization |
EP2629195B1 (en) * | 2010-01-28 | 2014-02-19 | Nds Limited | Exponentiation system |
RU2666285C1 (ru) * | 2017-10-06 | 2018-09-06 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Вятский государственный университет" (ВятГУ) | Способ организации выполнения операции умножения двух чисел в модулярно-логарифмическом формате представления с плавающей точкой на гибридных многоядерных процессорах |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51105245A (ja) * | 1975-03-13 | 1976-09-17 | Nippon Musical Instruments Mfg |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3610901A (en) * | 1969-09-09 | 1971-10-05 | Emerson Electric Co | Digital modified discrete fourier transform doppler radar processor |
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1978
- 1978-05-01 JP JP5074778A patent/JPS54144148A/ja active Granted
-
1980
- 1980-08-15 US US06/178,676 patent/US4366549A/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51105245A (ja) * | 1975-03-13 | 1976-09-17 | Nippon Musical Instruments Mfg |
Also Published As
Publication number | Publication date |
---|---|
JPS54144148A (en) | 1979-11-10 |
US4366549A (en) | 1982-12-28 |