JPS5756528Y2 - - Google Patents
Info
- Publication number
- JPS5756528Y2 JPS5756528Y2 JP5108277U JP5108277U JPS5756528Y2 JP S5756528 Y2 JPS5756528 Y2 JP S5756528Y2 JP 5108277 U JP5108277 U JP 5108277U JP 5108277 U JP5108277 U JP 5108277U JP S5756528 Y2 JPS5756528 Y2 JP S5756528Y2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5108277U JPS5756528Y2 (enrdf_load_stackoverflow) | 1977-04-19 | 1977-04-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5108277U JPS5756528Y2 (enrdf_load_stackoverflow) | 1977-04-19 | 1977-04-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS53145468U JPS53145468U (enrdf_load_stackoverflow) | 1978-11-16 |
| JPS5756528Y2 true JPS5756528Y2 (enrdf_load_stackoverflow) | 1982-12-04 |
Family
ID=28939783
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5108277U Expired JPS5756528Y2 (enrdf_load_stackoverflow) | 1977-04-19 | 1977-04-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5756528Y2 (enrdf_load_stackoverflow) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57199228A (en) * | 1981-06-02 | 1982-12-07 | Toshiba Corp | Wire bonding pad device |
| JPH06334100A (ja) * | 1993-05-25 | 1994-12-02 | Seiko Epson Corp | 半導体装置及びそのリードフレーム |
-
1977
- 1977-04-19 JP JP5108277U patent/JPS5756528Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS53145468U (enrdf_load_stackoverflow) | 1978-11-16 |