JPS5751195B2 - - Google Patents
Info
- Publication number
- JPS5751195B2 JPS5751195B2 JP49076074A JP7607474A JPS5751195B2 JP S5751195 B2 JPS5751195 B2 JP S5751195B2 JP 49076074 A JP49076074 A JP 49076074A JP 7607474 A JP7607474 A JP 7607474A JP S5751195 B2 JPS5751195 B2 JP S5751195B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17748—Structural details of configuration resources
- H03K19/1776—Structural details of configuration resources for memories
-
- A—HUMAN NECESSITIES
- A63—SPORTS; GAMES; AMUSEMENTS
- A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
- A63F9/00—Games not otherwise provided for
- A63F9/14—Racing games, traffic games, or obstacle games characterised by figures moved by action of the players
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Read Only Memory (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Complex Calculations (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49076074A JPS5751195B2 (cg-RX-API-DMAC7.html) | 1974-07-03 | 1974-07-03 | |
| US05/591,717 US4006470A (en) | 1974-07-03 | 1975-06-30 | Read-only memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP49076074A JPS5751195B2 (cg-RX-API-DMAC7.html) | 1974-07-03 | 1974-07-03 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS515929A JPS515929A (cg-RX-API-DMAC7.html) | 1976-01-19 |
| JPS5751195B2 true JPS5751195B2 (cg-RX-API-DMAC7.html) | 1982-10-30 |
Family
ID=13594644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49076074A Expired JPS5751195B2 (cg-RX-API-DMAC7.html) | 1974-07-03 | 1974-07-03 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4006470A (cg-RX-API-DMAC7.html) |
| JP (1) | JPS5751195B2 (cg-RX-API-DMAC7.html) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4142176A (en) * | 1976-09-27 | 1979-02-27 | Mostek Corporation | Series read only memory structure |
| US4103349A (en) * | 1977-06-16 | 1978-07-25 | Rockwell International Corporation | Output address decoder with gating logic for increased speed and less chip area |
| JPS607388B2 (ja) * | 1978-09-08 | 1985-02-23 | 富士通株式会社 | 半導体記憶装置 |
| US4402043A (en) * | 1980-11-24 | 1983-08-30 | Texas Instruments Incorporated | Microprocessor with compressed control ROM |
| JPS5812197A (ja) * | 1981-07-15 | 1983-01-24 | Nec Corp | 半導体装置 |
| JPS61287098A (ja) * | 1985-06-14 | 1986-12-17 | Nec Corp | 記憶回路 |
| JPS6251599U (cg-RX-API-DMAC7.html) * | 1986-08-22 | 1987-03-31 | ||
| US5815024A (en) * | 1993-06-11 | 1998-09-29 | Altera Corporation | Look-up table using multi-level decode |
| US5438295A (en) * | 1993-06-11 | 1995-08-01 | Altera Corporation | Look-up table using multi-level decode |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3721964A (en) * | 1970-02-18 | 1973-03-20 | Hewlett Packard Co | Integrated circuit read only memory bit organized in coincident select structure |
| US3774171A (en) * | 1971-11-08 | 1973-11-20 | Honeywell Inf Systems | Read only memory organization |
| US3914620A (en) * | 1973-12-26 | 1975-10-21 | Motorola Inc | Decode circuitry for bipolar random access memory |
-
1974
- 1974-07-03 JP JP49076074A patent/JPS5751195B2/ja not_active Expired
-
1975
- 1975-06-30 US US05/591,717 patent/US4006470A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4006470A (en) | 1977-02-01 |
| JPS515929A (cg-RX-API-DMAC7.html) | 1976-01-19 |