JPS575111A - Sequence display device - Google Patents

Sequence display device

Info

Publication number
JPS575111A
JPS575111A JP7897180A JP7897180A JPS575111A JP S575111 A JPS575111 A JP S575111A JP 7897180 A JP7897180 A JP 7897180A JP 7897180 A JP7897180 A JP 7897180A JP S575111 A JPS575111 A JP S575111A
Authority
JP
Japan
Prior art keywords
memory
control
lgss
stored
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7897180A
Other languages
Japanese (ja)
Inventor
Tadayoshi Wakita
Minoru Suzuki
Sadao Yanagida
Shigeru Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Tokyo Electric Power Company Holdings Inc
Original Assignee
Hitachi Engineering Co Ltd
Tokyo Electric Power Co Inc
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Tokyo Electric Power Co Inc, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP7897180A priority Critical patent/JPS575111A/en
Priority to US06/273,037 priority patent/US4445169A/en
Publication of JPS575111A publication Critical patent/JPS575111A/en
Pending legal-status Critical Current

Links

Landscapes

  • Programmable Controllers (AREA)
  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To facilitate the operation of making a new sequence (SQ) by representing each program (PG) for sequence control by logic symbols (LGS) and by displaying the program on a CRT by connecting respective LGSs. CONSTITUTION:Inputs X001-X006 to an SQ controller 3 are fetched in an input circuit 31 and processed by a control circuit 34 according to a sequence program in a main memory 33, and the results are stored in an accumulator 35 and outputted to an output relay Y001 via an output circuit 32. Through operation on the keyboard 27 of an SQ display device 2, the PG from the memory 33 is fetched in a buffer memory 24 and, under the control of a control circut 25, is converted into a PG consisting of LGSs by a conversion PG stored in an ROM27 to be stored in a refresh memory 22. According to the PG in the memory 22, a CRT control circuit 21 displays a signal from a symbol generator 23 on a CRT1 as one logical display unit. When an operator indicates that this display unit is used as one element of the SQ, LGSs of each displayed SQ are displayed simultaneously on the same screen by being connected together.
JP7897180A 1980-06-13 1980-06-13 Sequence display device Pending JPS575111A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP7897180A JPS575111A (en) 1980-06-13 1980-06-13 Sequence display device
US06/273,037 US4445169A (en) 1980-06-13 1981-06-12 Sequence display apparatus and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7897180A JPS575111A (en) 1980-06-13 1980-06-13 Sequence display device

Publications (1)

Publication Number Publication Date
JPS575111A true JPS575111A (en) 1982-01-11

Family

ID=13676780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7897180A Pending JPS575111A (en) 1980-06-13 1980-06-13 Sequence display device

Country Status (1)

Country Link
JP (1) JPS575111A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02135598A (en) * 1988-11-15 1990-05-24 Mitsubishi Electric Corp Digital processor
JPH0670762B2 (en) * 1986-07-07 1994-09-07 ベー・ベー・ツェー・ブラウン・ボベリ・アクチェンゲゼルシャフト Method for automatically creating a logic figure from a control program using a programming device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5556233A (en) * 1978-10-18 1980-04-24 Fujitsu Ltd Program input system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5556233A (en) * 1978-10-18 1980-04-24 Fujitsu Ltd Program input system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0670762B2 (en) * 1986-07-07 1994-09-07 ベー・ベー・ツェー・ブラウン・ボベリ・アクチェンゲゼルシャフト Method for automatically creating a logic figure from a control program using a programming device
JPH02135598A (en) * 1988-11-15 1990-05-24 Mitsubishi Electric Corp Digital processor

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