JPS57500444A - - Google Patents

Info

Publication number
JPS57500444A
JPS57500444A JP55502045A JP50204580A JPS57500444A JP S57500444 A JPS57500444 A JP S57500444A JP 55502045 A JP55502045 A JP 55502045A JP 50204580 A JP50204580 A JP 50204580A JP S57500444 A JPS57500444 A JP S57500444A
Authority
JP
Japan
Prior art keywords
objects
processors
processor
tasks
dispatching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55502045A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6334490B2 (OSRAM
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS57500444A publication Critical patent/JPS57500444A/ja
Publication of JPS6334490B2 publication Critical patent/JPS6334490B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/468—Specific access rights for resources, e.g. using capability register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02B—INTERNAL-COMBUSTION PISTON ENGINES; COMBUSTION ENGINES IN GENERAL
    • F02B75/00—Other engines
    • F02B75/02—Engines characterised by their cycles, e.g. six-stroke
    • F02B2075/022—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle
    • F02B2075/027—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle four
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/483—Multiproc

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Multi Processors (AREA)
  • Hardware Redundancy (AREA)
  • Communication Control (AREA)
JP55502045A 1980-02-28 1980-02-28 Expired JPS6334490B2 (OSRAM)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1980/000205 WO1981002477A1 (en) 1980-02-28 1980-02-28 Data processing system

Publications (2)

Publication Number Publication Date
JPS57500444A true JPS57500444A (OSRAM) 1982-03-11
JPS6334490B2 JPS6334490B2 (OSRAM) 1988-07-11

Family

ID=22154218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55502045A Expired JPS6334490B2 (OSRAM) 1980-02-28 1980-02-28

Country Status (5)

Country Link
EP (1) EP0047238B1 (OSRAM)
JP (1) JPS6334490B2 (OSRAM)
AT (1) ATE38442T1 (OSRAM)
DE (1) DE3072127D1 (OSRAM)
WO (1) WO1981002477A1 (OSRAM)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU613062B2 (en) * 1987-07-10 1991-07-25 Formulab International Pty Ltd A cognizant system
EP0360900B1 (de) * 1988-09-28 1993-06-02 Siemens Nixdorf Informationssysteme Aktiengesellschaft Verfahren zur Behandlung der von den einzelnen Prozessen einer Datenverarbeitungsanlage verursachten Arbeitsaufrufe an einen der Prozesse
ES2041291T3 (es) * 1988-09-28 1993-11-16 Siemens Nixdorf Informationssysteme Ag Procedimiento y dispositivo para el tratamiento de peticiones de interrupcion y de llamadas a procesos en un sistema combinado de control de interrupciones y del desarrollo para instalaciones de proceso de datos que trabajan al menos en parte en operacion en tiempo real.
EP0685950A3 (de) * 1994-06-03 1997-01-29 Philips Patentverwaltung Lokales, nach dem asynchronen Transfermodus (ATM) arbeitendes Netzwerk.
DE10105284A1 (de) 2001-02-06 2002-08-29 Infineon Technologies Ag Mikroprozessorschaltung für Datenträger und Verfahren zum Organisieren des Zugriffs auf in einem Speicher abgelegten Daten
CN110515658A (zh) * 2014-07-30 2019-11-29 莫维迪厄斯有限公司 用于管理可变长度指令的方法和设备
MA44821A (fr) 2016-02-27 2019-01-02 Kinzinger Automation Gmbh Procédé d'allocation d'une pile de registres virtuels dans une machine à pile
US11853026B2 (en) * 2018-05-07 2023-12-26 Lam Research Corporation Configurable distributed-interlock-system
CN110378601B (zh) * 2019-07-23 2023-04-18 山东爱新卓尔智慧医疗技术有限公司 一种基于双向队列的双批号药品自动分配方法与系统
US12267412B2 (en) 2022-04-22 2025-04-01 Schlage Lock Company Llc Technologies for secure inter-processor communications
CN114706700A (zh) * 2022-04-24 2022-07-05 京东科技信息技术有限公司 一种处理消息的方法及装置
CN115167933B (zh) * 2022-09-08 2022-12-02 深圳市恒运昌真空技术有限公司 一种双处理器设备及其控制方法和处理器
CN115639788B (zh) * 2022-09-09 2024-05-28 中国核动力研究设计院 基于数模混合技术的反应堆保护系统定期试验装置和方法
CN116680277B (zh) * 2023-07-28 2024-02-02 腾讯科技（深圳）有限公司 信息核验方法、装置、设备及存储介质
CN116723204B (zh) * 2023-08-07 2024-02-09 南京国电南自轨道交通工程有限公司 一种分层系统之间大数据量实时数据的同步方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52120728A (en) * 1976-04-05 1977-10-11 Agency Of Ind Science & Technol Sharing data control system of poly processor system
JPS535941A (en) * 1976-07-06 1978-01-19 Toshiba Corp Program execution system
JPS546743A (en) * 1977-06-17 1979-01-19 Nippon Telegr & Teleph Corp <Ntt> Inter-processor coupling systm
JPS5412658A (en) * 1977-06-30 1979-01-30 Kawasaki Heavy Ind Ltd Computer connecting system
JPS54101635A (en) * 1978-01-09 1979-08-10 Honeywell Inf Systems Queue structure for data processor
JPS54111733A (en) * 1978-02-21 1979-09-01 Nec Corp Multiplex processor system
JPS54161237A (en) * 1978-06-12 1979-12-20 Hitachi Ltd Address converting method

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2126206A (en) * 1937-02-15 1938-08-09 Dresner & Son Inc S Hand luggage
US3530438A (en) * 1965-12-13 1970-09-22 Sperry Rand Corp Task control
US3551892A (en) * 1969-01-15 1970-12-29 Ibm Interaction in a multi-processing system utilizing central timers
US3735360A (en) * 1971-08-25 1973-05-22 Ibm High speed buffer operation in a multi-processing system
US4015242A (en) * 1972-11-29 1977-03-29 Institut Francais Du Petrole, Des Carburants Et Lubrifiants Et Entreprise De Recherches Et D'activities Petrolieres Elf Device for coupling several data processing units to a single memory
FR2253428A5 (OSRAM) * 1973-11-30 1975-06-27 Honeywell Bull Soc Ind
FR2258113A5 (OSRAM) * 1973-11-30 1975-08-08 Honeywell Bull Soc Ind
US4073005A (en) * 1974-01-21 1978-02-07 Control Data Corporation Multi-processor computer system
US4044334A (en) * 1975-06-19 1977-08-23 Honeywell Information Systems, Inc. Database instruction unload
US4177513A (en) * 1977-07-08 1979-12-04 International Business Machines Corporation Task handling apparatus for a computer system
US4204251A (en) * 1977-12-28 1980-05-20 Finn Brudevold Interconnection unit for multiple data processing systems

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52120728A (en) * 1976-04-05 1977-10-11 Agency Of Ind Science & Technol Sharing data control system of poly processor system
JPS535941A (en) * 1976-07-06 1978-01-19 Toshiba Corp Program execution system
JPS546743A (en) * 1977-06-17 1979-01-19 Nippon Telegr & Teleph Corp <Ntt> Inter-processor coupling systm
JPS5412658A (en) * 1977-06-30 1979-01-30 Kawasaki Heavy Ind Ltd Computer connecting system
JPS54101635A (en) * 1978-01-09 1979-08-10 Honeywell Inf Systems Queue structure for data processor
JPS54111733A (en) * 1978-02-21 1979-09-01 Nec Corp Multiplex processor system
JPS54161237A (en) * 1978-06-12 1979-12-20 Hitachi Ltd Address converting method

Also Published As

Publication number Publication date
EP0047238A4 (en) 1986-08-21
EP0047238A1 (en) 1982-03-17
ATE38442T1 (de) 1988-11-15
WO1981002477A1 (en) 1981-09-03
EP0047238B1 (en) 1988-11-02
DE3072127D1 (en) 1988-12-08
JPS6334490B2 (OSRAM) 1988-07-11

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