JPS5746600Y2 - - Google Patents

Info

Publication number
JPS5746600Y2
JPS5746600Y2 JP1977010710U JP1071077U JPS5746600Y2 JP S5746600 Y2 JPS5746600 Y2 JP S5746600Y2 JP 1977010710 U JP1977010710 U JP 1977010710U JP 1071077 U JP1071077 U JP 1071077U JP S5746600 Y2 JPS5746600 Y2 JP S5746600Y2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1977010710U
Other languages
Japanese (ja)
Other versions
JPS53106670U (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1977010710U priority Critical patent/JPS5746600Y2/ja
Publication of JPS53106670U publication Critical patent/JPS53106670U/ja
Application granted granted Critical
Publication of JPS5746600Y2 publication Critical patent/JPS5746600Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1977010710U 1977-01-31 1977-01-31 Expired JPS5746600Y2 (https=)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1977010710U JPS5746600Y2 (https=) 1977-01-31 1977-01-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1977010710U JPS5746600Y2 (https=) 1977-01-31 1977-01-31

Publications (2)

Publication Number Publication Date
JPS53106670U JPS53106670U (https=) 1978-08-26
JPS5746600Y2 true JPS5746600Y2 (https=) 1982-10-14

Family

ID=28823805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977010710U Expired JPS5746600Y2 (https=) 1977-01-31 1977-01-31

Country Status (1)

Country Link
JP (1) JPS5746600Y2 (https=)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5420315B2 (https=) * 1974-07-15 1979-07-21

Also Published As

Publication number Publication date
JPS53106670U (https=) 1978-08-26

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