JPS5746309A - Synchronous protecting system - Google Patents

Synchronous protecting system

Info

Publication number
JPS5746309A
JPS5746309A JP55121913A JP12191380A JPS5746309A JP S5746309 A JPS5746309 A JP S5746309A JP 55121913 A JP55121913 A JP 55121913A JP 12191380 A JP12191380 A JP 12191380A JP S5746309 A JPS5746309 A JP S5746309A
Authority
JP
Japan
Prior art keywords
gate
synchronous
supplied
detected
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55121913A
Other languages
Japanese (ja)
Inventor
Shiro Tsuji
Koji Matsushima
Taiji Shimeki
Nobuyoshi Kihara
Misao Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP55121913A priority Critical patent/JPS5746309A/en
Publication of JPS5746309A publication Critical patent/JPS5746309A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G11B5/09—Digital recording

Abstract

PURPOSE:To detect the frame synchronous codes having unequal intervals, by using the function of the 2nd synchronous protecting gate. CONSTITUTION:The data train which is supplied 1 is supplied to a shift register 3 and detected for the coincidence with a synchronous pattern through a comparator 4 to be supplied to AND gates 8 and 9. While the data clock which is supplied 2 receives the counting through a counter 5 and in the 1-frame period, and a synchronous protecting gate 1 produced at a gate 6 is detected via the gate 8 in the form of a normal frame synchronous code to be delivered to a terminal 23 via a shift register 19 and an OR gate 21. In case when the length of frame is contracted by an electronic editing, no synchronous code is detected at the output of the gate 8. Then a synchronous protecting gate II produced at a gate 7 is supplied to an AND gate 9 to be detected.
JP55121913A 1980-09-02 1980-09-02 Synchronous protecting system Pending JPS5746309A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55121913A JPS5746309A (en) 1980-09-02 1980-09-02 Synchronous protecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55121913A JPS5746309A (en) 1980-09-02 1980-09-02 Synchronous protecting system

Publications (1)

Publication Number Publication Date
JPS5746309A true JPS5746309A (en) 1982-03-16

Family

ID=14823005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55121913A Pending JPS5746309A (en) 1980-09-02 1980-09-02 Synchronous protecting system

Country Status (1)

Country Link
JP (1) JPS5746309A (en)

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