JPS5731440Y2 - - Google Patents

Info

Publication number
JPS5731440Y2
JPS5731440Y2 JP1977125762U JP12576277U JPS5731440Y2 JP S5731440 Y2 JPS5731440 Y2 JP S5731440Y2 JP 1977125762 U JP1977125762 U JP 1977125762U JP 12576277 U JP12576277 U JP 12576277U JP S5731440 Y2 JPS5731440 Y2 JP S5731440Y2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1977125762U
Other languages
Japanese (ja)
Other versions
JPS5344436U (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS5344436U publication Critical patent/JPS5344436U/ja
Application granted granted Critical
Publication of JPS5731440Y2 publication Critical patent/JPS5731440Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP1977125762U 1976-09-20 1977-09-20 Expired JPS5731440Y2 (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/724,681 US4070706A (en) 1976-09-20 1976-09-20 Parallel requestor priority determination and requestor address matching in a cache memory system

Publications (2)

Publication Number Publication Date
JPS5344436U JPS5344436U (en:Method) 1978-04-15
JPS5731440Y2 true JPS5731440Y2 (en:Method) 1982-07-09

Family

ID=24911429

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977125762U Expired JPS5731440Y2 (en:Method) 1976-09-20 1977-09-20

Country Status (2)

Country Link
US (1) US4070706A (en:Method)
JP (1) JPS5731440Y2 (en:Method)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4158235A (en) * 1977-04-18 1979-06-12 Burroughs Corporation Multi port time-shared associative buffer storage pool
US4149245A (en) * 1977-06-09 1979-04-10 International Business Machines Corporation High speed store request processing control
US4354232A (en) * 1977-12-16 1982-10-12 Honeywell Information Systems Inc. Cache memory command buffer circuit
US4228503A (en) * 1978-10-02 1980-10-14 Sperry Corporation Multiplexed directory for dedicated cache memory system
US4208716A (en) * 1978-12-11 1980-06-17 Honeywell Information Systems Inc. Cache arrangement for performing simultaneous read/write operations
GB2037039B (en) 1978-12-11 1983-08-17 Honeywell Inf Systems Cache memory system
US4276609A (en) * 1979-01-04 1981-06-30 Ncr Corporation CCD memory retrieval system
US4484262A (en) * 1979-01-09 1984-11-20 Sullivan Herbert W Shared memory computer method and apparatus
JPH048824B2 (en:Method) * 1979-01-09 1992-02-18
ZA802367B (en) * 1979-05-09 1981-04-29 Int Computers Ltd Information storage arrangement
US5241666A (en) * 1979-06-04 1993-08-31 Unisys Corporation Variable rate improvement of disc cache subsystem
US4868734A (en) * 1984-04-30 1989-09-19 Unisys Corp. Variable rate improvement of disc cache subsystem
US4280177A (en) * 1979-06-29 1981-07-21 International Business Machines Corporation Implicit address structure and method for accessing an associative memory device
US4445191A (en) * 1979-08-13 1984-04-24 Burroughs Corporation Data word handling enhancement in a page oriented named-data hierarchical memory system
DE2935135C2 (de) * 1979-08-30 1983-01-20 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum Verarbeiten von Daten in einer aus Zentralprozessor, Arbeitsspeicher und dazwischen angeordnetem Pufferspeicher bestehenden Datenverarbeitungsanlage
US4345309A (en) * 1980-01-28 1982-08-17 Digital Equipment Corporation Relating to cached multiprocessor system with pipeline timing
US4371929A (en) * 1980-05-05 1983-02-01 Ibm Corporation Multiprocessor system with high density memory set architecture including partitionable cache store interface to shared disk drive memory
US4439837A (en) * 1981-06-16 1984-03-27 Ncr Corporation Non-volatile memory system for intelligent terminals
US4464712A (en) * 1981-07-06 1984-08-07 International Business Machines Corporation Second level cache replacement method and apparatus
JPS5948879A (ja) * 1982-09-10 1984-03-21 Hitachi Ltd 記憶制御方式
WO1984002799A1 (en) * 1982-12-30 1984-07-19 Ibm A hierarchical memory system including separate cache memories for storing data and instructions
US4881164A (en) * 1983-12-30 1989-11-14 International Business Machines Corporation Multi-microprocessor for controlling shared memory
US4669043A (en) * 1984-02-17 1987-05-26 Signetics Corporation Memory access controller
US4646233A (en) * 1984-06-20 1987-02-24 Weatherford James R Physical cache unit for computer
US4942518A (en) * 1984-06-20 1990-07-17 Convex Computer Corporation Cache store bypass for computer
US4875155A (en) * 1985-06-28 1989-10-17 International Business Machines Corporation Peripheral subsystem having read/write cache with record access
US4779189A (en) * 1985-06-28 1988-10-18 International Business Machines Corporation Peripheral subsystem initialization method and apparatus
US4797814A (en) * 1986-05-01 1989-01-10 International Business Machines Corporation Variable address mode cache
US4984153A (en) * 1988-04-27 1991-01-08 Unisys Corporation Storage locking control for a plurality of processors which share a common storage unit
DE68923863T2 (de) * 1989-01-13 1996-03-28 Ibm Ein-/Ausgabecachespeicherung.
JPH04233642A (ja) * 1990-07-27 1992-08-21 Dell Usa Corp キャッシュアクセスと並列的にメモリアクセスを行なうプロセッサ及びそれに用いられる方法
US5317749A (en) * 1992-09-25 1994-05-31 International Business Machines Corporation Method and apparatus for controlling access by a plurality of processors to a shared resource
US5566352A (en) * 1993-01-04 1996-10-15 Cirrus Logic, Inc. Register-read acknowledgment and prioritization for integration with a hardware-based interrupt acknowledgment mechanism
DE69327981T2 (de) * 1993-01-21 2000-10-05 Advanced Micro Devices, Inc. Kombinierte Speicheranordnung mit einem Vorausholungspuffer und einem Cachespeicher und Verfahren zur Befehlenversorgung für eine Prozessoreinheit, das diese Anordnung benutzt.
US5970253A (en) * 1997-01-09 1999-10-19 Unisys Corporation Priority logic for selecting and stacking data

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3699530A (en) * 1970-12-30 1972-10-17 Ibm Input/output system with dedicated channel buffering
US3812473A (en) * 1972-11-24 1974-05-21 Ibm Storage system with conflict-free multiple simultaneous access
US3896419A (en) * 1974-01-17 1975-07-22 Honeywell Inf Systems Cache memory store in a processor of a data processing system
US3938097A (en) * 1974-04-01 1976-02-10 Xerox Corporation Memory and buffer arrangement for digital computers

Also Published As

Publication number Publication date
US4070706A (en) 1978-01-24
JPS5344436U (en:Method) 1978-04-15

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