JPS5730068A - Data processing system - Google Patents

Data processing system

Info

Publication number
JPS5730068A
JPS5730068A JP10458480A JP10458480A JPS5730068A JP S5730068 A JPS5730068 A JP S5730068A JP 10458480 A JP10458480 A JP 10458480A JP 10458480 A JP10458480 A JP 10458480A JP S5730068 A JPS5730068 A JP S5730068A
Authority
JP
Japan
Prior art keywords
processor
processing
high speed
amount
newly added
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10458480A
Other languages
Japanese (ja)
Other versions
JPS5833975B2 (en
Inventor
Koichi Nozawa
Takao Ichihara
Norio Inui
Toshishige Tamura
Tsuguo Ueki
Nobuyuki Baba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10458480A priority Critical patent/JPS5833975B2/en
Publication of JPS5730068A publication Critical patent/JPS5730068A/en
Publication of JPS5833975B2 publication Critical patent/JPS5833975B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Abstract

PURPOSE:To simply increase the existing system function and amount of processing, by disconnecting a processor from the system, if the processor is in failure and keeping the processing with another processor only. CONSTITUTION:When a main storage device 1, 2nd processor 3 and input output devices 4-0 4-3 are used, a new processor is added to cope with the increase in the amount of processing. Taking notice that this newly added processor is higher in speed and has new functions in comparison with the existing processor 3, a normal operating function is executed with the newly added processor 2 in high speed, and the 2nd processor 3 is requested to process by the processor 2 for such processings as input/output processing, interrupting processing and predetermined processings which can not be done by the processor 2. Without doing so-called parallel processing for independent instruction, high speed processing as a single processor consisting of the 1st and 2nd processors 2,3 can be made.
JP10458480A 1980-07-30 1980-07-30 data processing system Expired JPS5833975B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10458480A JPS5833975B2 (en) 1980-07-30 1980-07-30 data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10458480A JPS5833975B2 (en) 1980-07-30 1980-07-30 data processing system

Publications (2)

Publication Number Publication Date
JPS5730068A true JPS5730068A (en) 1982-02-18
JPS5833975B2 JPS5833975B2 (en) 1983-07-23

Family

ID=14384478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10458480A Expired JPS5833975B2 (en) 1980-07-30 1980-07-30 data processing system

Country Status (1)

Country Link
JP (1) JPS5833975B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191044A (en) * 1982-04-26 1983-11-08 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Emulation system for general-purpose calculator
JPS6031648A (en) * 1983-07-29 1985-02-18 Sharp Corp Controlling method of multitask
JPS60114940A (en) * 1983-11-25 1985-06-21 Sharp Corp Device for multi-task control
JPS60114941A (en) * 1983-11-25 1985-06-21 Sharp Corp Device for multi-task control
JPS60118938A (en) * 1983-11-30 1985-06-26 Sharp Corp Multi-task controlling device
JPS60118937A (en) * 1983-11-30 1985-06-26 Sharp Corp Multi-task controlling device
JPS60214069A (en) * 1984-04-02 1985-10-26 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Processing system
JPH0731719U (en) * 1993-11-19 1995-06-16 三ツ星ベルト株式会社 Wide Toothed Belt for Transport
JP2010240364A (en) * 2009-04-06 2010-10-28 Yoshiharu Urata Pillow

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191044A (en) * 1982-04-26 1983-11-08 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Emulation system for general-purpose calculator
JPS6031648A (en) * 1983-07-29 1985-02-18 Sharp Corp Controlling method of multitask
JPH0376496B2 (en) * 1983-07-29 1991-12-05 Sharp Kk
JPH0376499B2 (en) * 1983-11-25 1991-12-05 Sharp Kk
JPS60114940A (en) * 1983-11-25 1985-06-21 Sharp Corp Device for multi-task control
JPS60114941A (en) * 1983-11-25 1985-06-21 Sharp Corp Device for multi-task control
JPH0376497B2 (en) * 1983-11-25 1991-12-05 Sharp Kk
JPH0376498B2 (en) * 1983-11-30 1991-12-05 Sharp Kk
JPS60118937A (en) * 1983-11-30 1985-06-26 Sharp Corp Multi-task controlling device
JPH0376500B2 (en) * 1983-11-30 1991-12-05 Sharp Kk
JPS60118938A (en) * 1983-11-30 1985-06-26 Sharp Corp Multi-task controlling device
JPS60214069A (en) * 1984-04-02 1985-10-26 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Processing system
JPH0731719U (en) * 1993-11-19 1995-06-16 三ツ星ベルト株式会社 Wide Toothed Belt for Transport
JP2010240364A (en) * 2009-04-06 2010-10-28 Yoshiharu Urata Pillow

Also Published As

Publication number Publication date
JPS5833975B2 (en) 1983-07-23

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