JPS5723307A - Amplifying circuit - Google Patents

Amplifying circuit

Info

Publication number
JPS5723307A
JPS5723307A JP9699180A JP9699180A JPS5723307A JP S5723307 A JPS5723307 A JP S5723307A JP 9699180 A JP9699180 A JP 9699180A JP 9699180 A JP9699180 A JP 9699180A JP S5723307 A JPS5723307 A JP S5723307A
Authority
JP
Japan
Prior art keywords
circuit
input signal
holding
signal
rise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9699180A
Other languages
Japanese (ja)
Inventor
Tatsuhisa Kahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tamura Electric Works Ltd
Original Assignee
Tamura Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tamura Electric Works Ltd filed Critical Tamura Electric Works Ltd
Priority to JP9699180A priority Critical patent/JPS5723307A/en
Publication of JPS5723307A publication Critical patent/JPS5723307A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To exactly execute a stable amplification, by discriminating rise and fall of an input signal, sample-holding a DC component by this discrimination output, and differentially amplifying this sample-holding output and the input signal.
CONSTITUTION: An input signal Si is applied to an averaging circuit 3 through a low-pass filter 1 and a phase inverting circuit 2, and is averaged. Also, the input signal is applied to a discriminating circuit 4 and rise and fall of the input signal are discriminated. A transistor GT of a holding circuit 5 is turned off by a rise discrimination output signal of this discriminating circuit 4, the transistor GT is turned on by a fall discrimination output signal, and a signal of the holding circuit 5 is made to follow an output signal of the averaging circuit 3. In this way, the output signal and the input signal of the holding circuit 5 are applied to a differential amplifying circuit 6 so that they are differentially amplified.
COPYRIGHT: (C)1982,JPO&Japio
JP9699180A 1980-07-16 1980-07-16 Amplifying circuit Pending JPS5723307A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9699180A JPS5723307A (en) 1980-07-16 1980-07-16 Amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9699180A JPS5723307A (en) 1980-07-16 1980-07-16 Amplifying circuit

Publications (1)

Publication Number Publication Date
JPS5723307A true JPS5723307A (en) 1982-02-06

Family

ID=14179661

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9699180A Pending JPS5723307A (en) 1980-07-16 1980-07-16 Amplifying circuit

Country Status (1)

Country Link
JP (1) JPS5723307A (en)

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