JPS5723152A - Parallel system of arithmetic device - Google Patents

Parallel system of arithmetic device

Info

Publication number
JPS5723152A
JPS5723152A JP9853180A JP9853180A JPS5723152A JP S5723152 A JPS5723152 A JP S5723152A JP 9853180 A JP9853180 A JP 9853180A JP 9853180 A JP9853180 A JP 9853180A JP S5723152 A JPS5723152 A JP S5723152A
Authority
JP
Japan
Prior art keywords
arithmetic
arithmetic device
series
normal
results
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9853180A
Other languages
Japanese (ja)
Inventor
Kuniyoshi Takeda
Masanori Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9853180A priority Critical patent/JPS5723152A/en
Publication of JPS5723152A publication Critical patent/JPS5723152A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits

Abstract

PURPOSE:To evade the stop of control functions due to a fault of one arithmetic device, by continuing control by supplying normal arithmetic results to a controlled system as far as the other arithmetic device is normal. CONSTITUTION:If an arithmetic device 1A in the A series of a parallel system gets out of order, its arithmetic results is stopped by an output discriminator 4A from being inputted to an output device 5. Therefore, the output device 5 which ORs the arithmetic results that have been judged to be correct or incorrect supplies the normal arithmetic results of an arithmetic device 1B in the B series inputted via an output discriminator 4B to a controlled system 73. Similarly, when the arithmetic device 1A in the A series is normal and the arithmetic device 1B in the B series is troubled, the normal arithmetic results of the A-series arithmetic device 1A are supplied to the controlled system 3.
JP9853180A 1980-07-17 1980-07-17 Parallel system of arithmetic device Pending JPS5723152A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9853180A JPS5723152A (en) 1980-07-17 1980-07-17 Parallel system of arithmetic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9853180A JPS5723152A (en) 1980-07-17 1980-07-17 Parallel system of arithmetic device

Publications (1)

Publication Number Publication Date
JPS5723152A true JPS5723152A (en) 1982-02-06

Family

ID=14222254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9853180A Pending JPS5723152A (en) 1980-07-17 1980-07-17 Parallel system of arithmetic device

Country Status (1)

Country Link
JP (1) JPS5723152A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6189252U (en) * 1984-11-19 1986-06-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6189252U (en) * 1984-11-19 1986-06-10
JPH0324025Y2 (en) * 1984-11-19 1991-05-24

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