JPS572110A - Automatic gain control circuit - Google Patents

Automatic gain control circuit

Info

Publication number
JPS572110A
JPS572110A JP7540380A JP7540380A JPS572110A JP S572110 A JPS572110 A JP S572110A JP 7540380 A JP7540380 A JP 7540380A JP 7540380 A JP7540380 A JP 7540380A JP S572110 A JPS572110 A JP S572110A
Authority
JP
Japan
Prior art keywords
amplifier
signal
band
control
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7540380A
Other languages
Japanese (ja)
Inventor
Taichiro Kamiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7540380A priority Critical patent/JPS572110A/en
Publication of JPS572110A publication Critical patent/JPS572110A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Superheterodyne Receivers (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

PURPOSE:To realize a sufficient control of gain even at a particularly high input signal level, by adding a control circuit for attenuation quantity of RF band signal to a heterodyne receiver which gives an automatic control to the gain of the intermediate frequency band and at the same time controlling the gain of the RF band. CONSTITUTION:The input signal Sin of the RF band is supplied to a received frequency converter 21 with a preintermediate frequency amplifier through an attenuation quantity control circuit 33 and then sent to a main intermediate frequency amplifier 22 after receiving a frequency conversion by the output of a local oscillator 25. A part of the output Sout of the amplifier 22 receives a negative feedback from a DC amplifier 23 with rectifier to the amplifier 22 and is also sent to a control amplifier 32. The amplifier 32 increases a control signal S2 when the input Sin of RF band exceeds the standard received input level set by a variable resistance Rv. Thus an RF signal attenuating circuit 31 has an attenuating action. In such way, the signal Sout is controlled at a certain level like in the case of 36 although the signal Sin increases.
JP7540380A 1980-06-06 1980-06-06 Automatic gain control circuit Pending JPS572110A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7540380A JPS572110A (en) 1980-06-06 1980-06-06 Automatic gain control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7540380A JPS572110A (en) 1980-06-06 1980-06-06 Automatic gain control circuit

Publications (1)

Publication Number Publication Date
JPS572110A true JPS572110A (en) 1982-01-07

Family

ID=13575169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7540380A Pending JPS572110A (en) 1980-06-06 1980-06-06 Automatic gain control circuit

Country Status (1)

Country Link
JP (1) JPS572110A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6349817U (en) * 1986-09-19 1988-04-04
JPS63113667U (en) * 1987-01-20 1988-07-21
JPS6490689A (en) * 1987-09-30 1989-04-07 Matsushita Electric Ind Co Ltd Frequency converter for receiving satellite broadcasting
EP0439435A2 (en) * 1990-01-17 1991-07-31 STMicroelectronics S.r.l. Control loop for reducing the time of response of a tuner-AGC of a superheterodyne receiver and relative leading edge differentiating circuit used in the control loop

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6349817U (en) * 1986-09-19 1988-04-04
JPS63113667U (en) * 1987-01-20 1988-07-21
JPS6490689A (en) * 1987-09-30 1989-04-07 Matsushita Electric Ind Co Ltd Frequency converter for receiving satellite broadcasting
EP0439435A2 (en) * 1990-01-17 1991-07-31 STMicroelectronics S.r.l. Control loop for reducing the time of response of a tuner-AGC of a superheterodyne receiver and relative leading edge differentiating circuit used in the control loop
US5263186A (en) * 1990-01-17 1993-11-16 Sgs-Thomson Microelectronics S.R.L. Control loop for reducing the time of repsonse of a tuner-AGC of a superheterodyne receiver and relative leading edge differentiating circuit used in the control loop

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