JPS5720825A - System interface controller - Google Patents

System interface controller

Info

Publication number
JPS5720825A
JPS5720825A JP9474680A JP9474680A JPS5720825A JP S5720825 A JPS5720825 A JP S5720825A JP 9474680 A JP9474680 A JP 9474680A JP 9474680 A JP9474680 A JP 9474680A JP S5720825 A JPS5720825 A JP S5720825A
Authority
JP
Japan
Prior art keywords
reset
interface controller
system interface
controlling circuit
controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9474680A
Other languages
Japanese (ja)
Other versions
JPS6019803B2 (en
Inventor
Toshio Yagihashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55094746A priority Critical patent/JPS6019803B2/en
Publication of JPS5720825A publication Critical patent/JPS5720825A/en
Publication of JPS6019803B2 publication Critical patent/JPS6019803B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To eliminate a reset controlling circuit at each device, by providing a reset batch controlling circuit into a system interface controller to receive various types of reset signals from an operator panel, etc. CONSTITUTION:A reset batch controlling circuit 12 in a system interface controller 11 receives the power supply on-reset, the system initialization, the system reset, the master reset, the unit reset, etc. from a system operator panel 5 and a maintenance panel 6 via signal lines 108, 109, etc. Then an encoder 15 performs encoding by each device such as a CPU1, an input/output controller 2, etc. and then discriminates the reset factors. Based on the result of discrimination of reset factors, a reset signal producing circuit 17 produces a reset signal corresponding to each device. In such way, the reset signals corresponding to various devices are produced en bloc in the controller 11 to eliminate the reset signal producing circuit at each device. This results in a reduction of the quantity of hardware.
JP55094746A 1980-07-11 1980-07-11 System interface control device Expired JPS6019803B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55094746A JPS6019803B2 (en) 1980-07-11 1980-07-11 System interface control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55094746A JPS6019803B2 (en) 1980-07-11 1980-07-11 System interface control device

Publications (2)

Publication Number Publication Date
JPS5720825A true JPS5720825A (en) 1982-02-03
JPS6019803B2 JPS6019803B2 (en) 1985-05-18

Family

ID=14118683

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55094746A Expired JPS6019803B2 (en) 1980-07-11 1980-07-11 System interface control device

Country Status (1)

Country Link
JP (1) JPS6019803B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63192828U (en) * 1987-05-29 1988-12-12
JPS6466721A (en) * 1987-09-08 1989-03-13 Nec Corp Resetting circuit
JPH01123229U (en) * 1988-02-15 1989-08-22
JPH03166615A (en) * 1989-11-27 1991-07-18 Nec Corp Initialization factor analyzing circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63192828U (en) * 1987-05-29 1988-12-12
JPS6466721A (en) * 1987-09-08 1989-03-13 Nec Corp Resetting circuit
JPH01123229U (en) * 1988-02-15 1989-08-22
JPH03166615A (en) * 1989-11-27 1991-07-18 Nec Corp Initialization factor analyzing circuit

Also Published As

Publication number Publication date
JPS6019803B2 (en) 1985-05-18

Similar Documents

Publication Publication Date Title
JPS54106776A (en) Positioning device
JPS5720825A (en) System interface controller
EP0297931A3 (en) Bus adapter unit for digital data processing system
JPS5497947A (en) Parallel elevator cage controller
JPS54117603A (en) Line monitor system
TW225593B (en) Integrated control system for distributed processing
JPS55123704A (en) Maintenance device of control unit
JPS56149056A (en) System for checking abnormality in copying machine provided with external attachment
JPS5726984A (en) Remote control system
JPS6478097A (en) Control system for plural pieces of equipment
JPS5530719A (en) State supervisory system
JPS56159726A (en) Bus request processor
JPS5762413A (en) Programable control system
JPS56168215A (en) Process step-forward type sequence controller
JPS6489990A (en) Highly integrated control board
JPS5416945A (en) Signal transmission system
JPS5427676A (en) Process control system
JPS644848A (en) Data communication system
JPS5752906A (en) Sequence control system
JPS6491202A (en) Processing method for analog set input by program controller
JPS6473856A (en) Telecontroller
JPS6411834A (en) Totaling device for totaling inputs of working condition of printing machine
JPS6447158A (en) Message output system
JPS5660905A (en) Electronic computer control system of batching plant
JPS54133282A (en) Sequence control circuit