JPS57207951A - Microprogram controlling type data processor - Google Patents

Microprogram controlling type data processor

Info

Publication number
JPS57207951A
JPS57207951A JP9447681A JP9447681A JPS57207951A JP S57207951 A JPS57207951 A JP S57207951A JP 9447681 A JP9447681 A JP 9447681A JP 9447681 A JP9447681 A JP 9447681A JP S57207951 A JPS57207951 A JP S57207951A
Authority
JP
Japan
Prior art keywords
level
register
microprogram
processing
interruption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9447681A
Other languages
Japanese (ja)
Other versions
JPS6227413B2 (en
Inventor
Hajime Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9447681A priority Critical patent/JPS57207951A/en
Publication of JPS57207951A publication Critical patent/JPS57207951A/en
Publication of JPS6227413B2 publication Critical patent/JPS6227413B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To improve the efficiency of interruption processing of the titled processor, by commonly using hardware/firmware resources, such as register accumulator, etc., between plural microprogram executing levels which are different in priority. CONSTITUTION:When a controlling circuit 6 judges an occurrence of an interruption request of a level 2 which is higher in priority than the level 1 of another interruption being executed, the circuit 6 generates an instruction 40 and evacuates and plants the content of an address register 4 in a return address stack 5, and then, sets an execution start micro-instruction address of a microprogram executing level for the level 2 in the register 4. Then, the microprogram of the level 2 is executed. When an FF 12 is set, a firmware for level processing evacuates the contents of a register for working 7a, an accumulator, etc., in a high speed memory for working 11. If the FF 12 is set when the processing of the level 2 is completed, the planted contents are returned to the register 7a from the memory 11.
JP9447681A 1981-06-18 1981-06-18 Microprogram controlling type data processor Granted JPS57207951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9447681A JPS57207951A (en) 1981-06-18 1981-06-18 Microprogram controlling type data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9447681A JPS57207951A (en) 1981-06-18 1981-06-18 Microprogram controlling type data processor

Publications (2)

Publication Number Publication Date
JPS57207951A true JPS57207951A (en) 1982-12-20
JPS6227413B2 JPS6227413B2 (en) 1987-06-15

Family

ID=14111322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9447681A Granted JPS57207951A (en) 1981-06-18 1981-06-18 Microprogram controlling type data processor

Country Status (1)

Country Link
JP (1) JPS57207951A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59202543A (en) * 1983-05-04 1984-11-16 Hitachi Ltd Os firmware system
JPS63132368A (en) * 1986-11-21 1988-06-04 Nec Corp Interrupting system for multiprocessor

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02135648U (en) * 1989-04-12 1990-11-13

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5031749A (en) * 1973-07-21 1975-03-28
JPS567150A (en) * 1979-06-29 1981-01-24 Matsushita Electric Ind Co Ltd Information processor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5031749A (en) * 1973-07-21 1975-03-28
JPS567150A (en) * 1979-06-29 1981-01-24 Matsushita Electric Ind Co Ltd Information processor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59202543A (en) * 1983-05-04 1984-11-16 Hitachi Ltd Os firmware system
JPH0527141B2 (en) * 1983-05-04 1993-04-20 Hitachi Ltd
JPS63132368A (en) * 1986-11-21 1988-06-04 Nec Corp Interrupting system for multiprocessor

Also Published As

Publication number Publication date
JPS6227413B2 (en) 1987-06-15

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