JPS57207483A - Clamp circuit - Google Patents
Clamp circuitInfo
- Publication number
- JPS57207483A JPS57207483A JP56093211A JP9321181A JPS57207483A JP S57207483 A JPS57207483 A JP S57207483A JP 56093211 A JP56093211 A JP 56093211A JP 9321181 A JP9321181 A JP 9321181A JP S57207483 A JPS57207483 A JP S57207483A
- Authority
- JP
- Japan
- Prior art keywords
- video signal
- input video
- clamp pulse
- output
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/16—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level
- H04N5/18—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level by means of "clamp" circuit operated by switching circuit
- H04N5/185—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level by means of "clamp" circuit operated by switching circuit for the black level
Abstract
PURPOSE:To perform complete DC component reproduction, by sample-holding an input video signal with a clamp pulse to obtain, the output difference between the output and the input video signal, and fixing the input video signal to zero potential. CONSTITUTION:An output of a sample hold circuit 1 is applied to an inverting input terminal of an operational amplifier 2 via a resistor 3, an input video signal is voltage-divided with resistors 4 and 5, and applied to a non-inverting input terminal of the amplifier 2. Thus, even if a DC component is lost with a CR coupler or the like, a DC component differential voltage is outputted at the point of existing time of a clamp pulse at the circuit 1 and held until the next clamp pulse, and a signal fixing the input video signal to zero potential is outputted at a clamp pulse period with the difference voltage subtracted from the input video signal with a differential amplifier.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56093211A JPS57207483A (en) | 1981-06-17 | 1981-06-17 | Clamp circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56093211A JPS57207483A (en) | 1981-06-17 | 1981-06-17 | Clamp circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57207483A true JPS57207483A (en) | 1982-12-20 |
Family
ID=14076228
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56093211A Pending JPS57207483A (en) | 1981-06-17 | 1981-06-17 | Clamp circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57207483A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5919469A (en) * | 1982-07-23 | 1984-01-31 | Sony Corp | Clamp circuit |
-
1981
- 1981-06-17 JP JP56093211A patent/JPS57207483A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5919469A (en) * | 1982-07-23 | 1984-01-31 | Sony Corp | Clamp circuit |
JPH0430229B2 (en) * | 1982-07-23 | 1992-05-21 |
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