JPS57207462A - Monitor device - Google Patents
Monitor deviceInfo
- Publication number
- JPS57207462A JPS57207462A JP9250281A JP9250281A JPS57207462A JP S57207462 A JPS57207462 A JP S57207462A JP 9250281 A JP9250281 A JP 9250281A JP 9250281 A JP9250281 A JP 9250281A JP S57207462 A JPS57207462 A JP S57207462A
- Authority
- JP
- Japan
- Prior art keywords
- value
- difference
- detected
- output
- reception
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
- H04L27/06—Demodulator circuits; Receiver circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To provide general-purpose performance for the constitution of a device and to attain high speed without using ROMs and the like, through the confirmation if a normal reception state is given or not, by detecting the difference between a reception signal and a discriminated value and comparing an output smoothing the detected value and a prescribed value. CONSTITUTION:An input 100 is inputted to a synchronizing detection circuit 1, two orthogonal base band signals are outputted from the circuit 1 and applied to error detectors 6 and 6'. An error between a reception and a discriminating value is detected at the discriminators 60 and 60' of the detectors 6 and 6', subtractors 61 and 61' compare the reception signal and the discriminating value and the difference is detected. The output of subtractors 61 and 61' is rectified at full-wave rectifying circuits 62 and 62', and the output of the circuits 62 and 62' is synthesized at an adder 7. A signal corresponding to the difference between the reception signal and the discrimination value from the adder 7 is smoothed at an LPF4 and compared with a prescribed reference at a comparator 5 without the use of ROMs by confirming whether or not the normal reception state is obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9250281A JPS57207462A (en) | 1981-06-16 | 1981-06-16 | Monitor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9250281A JPS57207462A (en) | 1981-06-16 | 1981-06-16 | Monitor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57207462A true JPS57207462A (en) | 1982-12-20 |
Family
ID=14056078
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9250281A Pending JPS57207462A (en) | 1981-06-16 | 1981-06-16 | Monitor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57207462A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5084121A (en) * | 1973-11-26 | 1975-07-07 | ||
JPS554105A (en) * | 1978-06-23 | 1980-01-12 | Toshiba Corp | Information transmission system |
-
1981
- 1981-06-16 JP JP9250281A patent/JPS57207462A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5084121A (en) * | 1973-11-26 | 1975-07-07 | ||
JPS554105A (en) * | 1978-06-23 | 1980-01-12 | Toshiba Corp | Information transmission system |
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