JPS57194616A - Variable delay equalizing circuit - Google Patents

Variable delay equalizing circuit

Info

Publication number
JPS57194616A
JPS57194616A JP7867681A JP7867681A JPS57194616A JP S57194616 A JPS57194616 A JP S57194616A JP 7867681 A JP7867681 A JP 7867681A JP 7867681 A JP7867681 A JP 7867681A JP S57194616 A JPS57194616 A JP S57194616A
Authority
JP
Japan
Prior art keywords
input terminal
resistance
group delay
capacitor
variable resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7867681A
Other languages
Japanese (ja)
Inventor
Shinpei Matsuzaki
Norio Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7867681A priority Critical patent/JPS57194616A/en
Publication of JPS57194616A publication Critical patent/JPS57194616A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/04—Control of transmission; Equalising
    • H04B3/14—Control of transmission; Equalising characterised by the equalising network used
    • H04B3/146—Control of transmission; Equalising characterised by the equalising network used using phase-frequency equalisers
    • H04B3/148—Control of transmission; Equalising characterised by the equalising network used using phase-frequency equalisers variable equalisers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To perform wide-range adjustment by varying a group delay peak value by a variable resistance connected to the univerted input terminal of an operational amplifier, and varying a group delay peak frequency position by a variable resistance connected across a capacitor on the uninverted input terminal side. CONSTITUTION:A resistance R1 is provided between the inverted input terminal of an operational amplifier 1 and an input terminal, and a resistance R2 is connected between the inverted input terminal and the output of the amplifier 1. Further, a variable resistance Rx is connected between the uninverted input terminal of the amplifier 1 and the input terminal, and a capacitor C0 is connected between the uninverted input terminal and an earth terminal; and and network N having the inductive impedance with an inductance value inversely proportional to the resistance value of an external variable resistance Ry is connected in parallel to the capacitor C0. Then, a group delay peak value is varied by the resistance Rx and a group delay peak frequency position is varied by the resistance Ry.
JP7867681A 1981-05-26 1981-05-26 Variable delay equalizing circuit Pending JPS57194616A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7867681A JPS57194616A (en) 1981-05-26 1981-05-26 Variable delay equalizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7867681A JPS57194616A (en) 1981-05-26 1981-05-26 Variable delay equalizing circuit

Publications (1)

Publication Number Publication Date
JPS57194616A true JPS57194616A (en) 1982-11-30

Family

ID=13668466

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7867681A Pending JPS57194616A (en) 1981-05-26 1981-05-26 Variable delay equalizing circuit

Country Status (1)

Country Link
JP (1) JPS57194616A (en)

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