JPS57188140A - Reference signal generating circuit - Google Patents
Reference signal generating circuitInfo
- Publication number
- JPS57188140A JPS57188140A JP56073714A JP7371481A JPS57188140A JP S57188140 A JPS57188140 A JP S57188140A JP 56073714 A JP56073714 A JP 56073714A JP 7371481 A JP7371481 A JP 7371481A JP S57188140 A JPS57188140 A JP S57188140A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- preset
- circuit
- counter
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003111 delayed effect Effects 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/131—Digitally controlled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00078—Fixed delay
- H03K2005/00097—Avoiding variations of delay using feedback, e.g. controlled by a PLL
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00293—Output pulse is a delayed pulse issued after a rising or a falling edge, the length of the output pulse not being in relation with the length of the input triggering pulse
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56073714A JPS57188140A (en) | 1981-05-15 | 1981-05-15 | Reference signal generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56073714A JPS57188140A (en) | 1981-05-15 | 1981-05-15 | Reference signal generating circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57188140A true JPS57188140A (en) | 1982-11-19 |
JPH0337332B2 JPH0337332B2 (enrdf_load_stackoverflow) | 1991-06-05 |
Family
ID=13526159
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56073714A Granted JPS57188140A (en) | 1981-05-15 | 1981-05-15 | Reference signal generating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57188140A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08179847A (ja) * | 1994-12-26 | 1996-07-12 | Sony Corp | クロック信号発生装置 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5425658A (en) * | 1977-07-28 | 1979-02-26 | Matsushita Electric Ind Co Ltd | Prequency demultiplier |
-
1981
- 1981-05-15 JP JP56073714A patent/JPS57188140A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5425658A (en) * | 1977-07-28 | 1979-02-26 | Matsushita Electric Ind Co Ltd | Prequency demultiplier |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08179847A (ja) * | 1994-12-26 | 1996-07-12 | Sony Corp | クロック信号発生装置 |
Also Published As
Publication number | Publication date |
---|---|
JPH0337332B2 (enrdf_load_stackoverflow) | 1991-06-05 |
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