JPS57186299A - Data processing device - Google Patents

Data processing device

Info

Publication number
JPS57186299A
JPS57186299A JP56071615A JP7161581A JPS57186299A JP S57186299 A JPS57186299 A JP S57186299A JP 56071615 A JP56071615 A JP 56071615A JP 7161581 A JP7161581 A JP 7161581A JP S57186299 A JPS57186299 A JP S57186299A
Authority
JP
Japan
Prior art keywords
memory
reading
writing operations
processing device
artificial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56071615A
Other languages
Japanese (ja)
Other versions
JPS6138509B2 (en
Inventor
Hiroshi Oota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56071615A priority Critical patent/JPS57186299A/en
Publication of JPS57186299A publication Critical patent/JPS57186299A/en
Publication of JPS6138509B2 publication Critical patent/JPS6138509B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To perform highly reliable reading and writing operations which are necessary for testing and diagnostic, by installing an aritifical memory having a small capacity which has a processing device with the interface specifications which is smaller to that of an ordinary memory and which is able to perform reading and writing operations, commonly to the interface line. CONSTITUTION:The titled device consists of an aritifical memory 1 which commonly uses an interface line of a processing device P of a memory M and performs reading and writing operations based on the signal on the interface line, an instruction decoding circuit 2 which designates reading and writing operations to the artificial memory 1, a designation flip flop 3 which is set by the command from the processing device P, a memory access managing circuit 4 which generates an access request signal to the artificial memory 1, and a read-out data switching circuit 6 which switches each reading out bus. The artificial memory 1 performs reading and writing operations from the memory M based on the command from the flip flop 3.
JP56071615A 1981-05-13 1981-05-13 Data processing device Granted JPS57186299A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56071615A JPS57186299A (en) 1981-05-13 1981-05-13 Data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56071615A JPS57186299A (en) 1981-05-13 1981-05-13 Data processing device

Publications (2)

Publication Number Publication Date
JPS57186299A true JPS57186299A (en) 1982-11-16
JPS6138509B2 JPS6138509B2 (en) 1986-08-29

Family

ID=13465723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56071615A Granted JPS57186299A (en) 1981-05-13 1981-05-13 Data processing device

Country Status (1)

Country Link
JP (1) JPS57186299A (en)

Also Published As

Publication number Publication date
JPS6138509B2 (en) 1986-08-29

Similar Documents

Publication Publication Date Title
JPS56140452A (en) Memory protection system
JPS57101957A (en) Storage control device
JPS57117027A (en) Signal sending and receiving circuit
EP0173981A3 (en) Cache memory control circuit
EP0250242A3 (en) Semiconductor memory device having erroneous write operation preventing circuit
IL67664A (en) Computer memory system with data,address and operation error detection
JPS644838A (en) Method for switching os (operating system)
JPS57186299A (en) Data processing device
JPS5326632A (en) Common memory control unit
JPS575142A (en) Data processor with interface function
JPS57164338A (en) Selection circuit for priority
JPS57182863A (en) External memory controlling system
JPS5730454A (en) Terminal equipment
JPS57143654A (en) Memory sequence extending circuit
JPS57130141A (en) Remote supervisory device for power system
JPS57197653A (en) Control device of microprogram
GB1547628A (en) Data processing systems
JPS5640957A (en) Magnetic tape control system
JPS5643896A (en) Key telephone control circuit
JPS6442744A (en) Microprocessor
JPS56149626A (en) Channel device
JPS5745659A (en) Memory address managing device
JPS54154235A (en) Data process system containing peripheral unit adaptor
JPS5713563A (en) Data access system in auxiliary memory device
JPS5362939A (en) Common information control system