JPS5718168A - Key signal generation device - Google Patents

Key signal generation device

Info

Publication number
JPS5718168A
JPS5718168A JP9358580A JP9358580A JPS5718168A JP S5718168 A JPS5718168 A JP S5718168A JP 9358580 A JP9358580 A JP 9358580A JP 9358580 A JP9358580 A JP 9358580A JP S5718168 A JPS5718168 A JP S5718168A
Authority
JP
Japan
Prior art keywords
signal
key signal
video
key
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9358580A
Other languages
Japanese (ja)
Inventor
Hideji Hirakawa
Akihiko Minami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9358580A priority Critical patent/JPS5718168A/en
Publication of JPS5718168A publication Critical patent/JPS5718168A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
  • Studio Circuits (AREA)

Abstract

PURPOSE:To hold a synchronizing relation of a key signal and a video signal, by delaying a control data of a key signal. CONSTITUTION:A video signal fp is inputted to a video processing equipment 11, and is written in a memory device 12 in accordance with a write timing signal Tw which has been generated from its own synchronizing component. The video signal fp which has been stored is read out and outputted in accordance with a read timing signal TR which has been generated corresponding to a reference synchronizing signal fs. On the other hand, a key signal data fKD which is outputted by a key signal controller 13 is stored by the write timing signal in the same way as the video signal, and is read out by the read timing signal TR. This key signal data fKD which has been read out is supplied to a key signal generator 14, an actual key signal fK is generated, and processes a video signal which is outputted by the video processing equipment 11. Accordingly, since the key signal data fKD is also delayed in the same way as the video signal fp, it is possible to hold synchronization of the video signal fp and key signal fk.
JP9358580A 1980-07-09 1980-07-09 Key signal generation device Pending JPS5718168A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9358580A JPS5718168A (en) 1980-07-09 1980-07-09 Key signal generation device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9358580A JPS5718168A (en) 1980-07-09 1980-07-09 Key signal generation device

Publications (1)

Publication Number Publication Date
JPS5718168A true JPS5718168A (en) 1982-01-29

Family

ID=14086352

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9358580A Pending JPS5718168A (en) 1980-07-09 1980-07-09 Key signal generation device

Country Status (1)

Country Link
JP (1) JPS5718168A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6016073A (en) * 1983-07-08 1985-01-26 Nec Corp Dve interlocking circuit
US5563663A (en) * 1990-12-21 1996-10-08 Thomson Consumer Electronics Method for the synchronization of control functions with video signals in a television receiver and device for the implementation thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144622A (en) * 1977-05-24 1978-12-16 Sony Corp Video signal processing system
JPS5478619A (en) * 1977-12-05 1979-06-22 Nec Corp Special effect waveform generator
JPS54139331A (en) * 1978-04-21 1979-10-29 Toshiba Corp Recording and reproducing system of zooming picture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53144622A (en) * 1977-05-24 1978-12-16 Sony Corp Video signal processing system
JPS5478619A (en) * 1977-12-05 1979-06-22 Nec Corp Special effect waveform generator
JPS54139331A (en) * 1978-04-21 1979-10-29 Toshiba Corp Recording and reproducing system of zooming picture

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6016073A (en) * 1983-07-08 1985-01-26 Nec Corp Dve interlocking circuit
US5563663A (en) * 1990-12-21 1996-10-08 Thomson Consumer Electronics Method for the synchronization of control functions with video signals in a television receiver and device for the implementation thereof

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